mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-26 21:50:54 +07:00
Renesas ARM64 Based SoC DT Updates for v4.6
* Use SCIF fallback compatibility strings * Add Baud Rate Generator (BRG) support for (H)SCIF * Enable SCIF_CLK frequency and pins * Enable USB 3.0 host * Add Add USB-DMAC device nodes * Complete SYS-DMAC device nodes -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJWs16GAAoJENfPZGlqN0++j9IP/ixHDobnJAUKz0KSIv5esGl7 pZIX08cKi45N0L3PTFDsABr0Mwafcs/lTepOZCMgdgoXFJOjbHe3r1cBKVptyqbz Ox7xYXG7TbONhSe77IbhtwIFXcG6BmNt/x2eKiJVw4/riSgBWvP8OScfcH9qJL3u kl32/wIwqAQaYazMHDfE7u1jIRW2JrqHI4cXjR+y7sgl1+VsnvSYjKA4nwc0TcP/ QU6QCyLq27TUn3ViSGPHGqEj3mNy+aWla7rgsCydH3W9jCGKb4W+AnX1ee5lRzhP uFrU/MgRJ+XLKrhcrZk7H/0IEtDYRUyEnD9wXEhtdIKkeacVvwB5egrm6V25y3O6 1rqpZl3qya6pOiTtGZD7fc5pAWCXJSgvzjUPA2FfwT5U+UeBMP3AEoZagITw3xNX FInFt+GBnPCZ06OUBISCbVzOFv9CKYy/EQKFxMKkieQhSTJaZPAj3hHA6hmz64jZ c4LTe+qoHBMKO0XfjmK+j6ASiU0kjduFRWEvRIRYE4mmOLnuQIAH4xQGDCSnIdaw wnYlH6npMJiVL0x+nrEIiM7KcoHXDrl3lD/b4Usogbw8q5WLtVwPxId7ZdTOUfKF VGzClqflVt/1SWTgZkKcKO212Q5VUhdN29JID6z6pqYwWwUPNxwSJl7wdwURqa2M Lx8bf318ssvbLMCUOntR =vJZy -----END PGP SIGNATURE----- Merge tag 'renesas-arm64-dt-for-v4.6' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt64 Renesas ARM64 Based SoC DT Updates for v4.6 * Use SCIF fallback compatibility strings * Add Baud Rate Generator (BRG) support for (H)SCIF * Enable SCIF_CLK frequency and pins * Enable USB 3.0 host * Add Add USB-DMAC device nodes * Complete SYS-DMAC device nodes * tag 'renesas-arm64-dt-for-v4.6' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: arm64: dts: salvator-x: Enable SCIF_CLK frequency and pins arm64: dts: r8a7795: Add BRG support for (H)SCIF arm64: dts: r8a7795: Rename the serial port clock to fck arm64: dts: r8a7795: Add SCIF fallback compatibility strings arm64: dts: r8a7795: Add USB-DMAC device nodes arm64: dts: salvator-x: enable usb3.0 host channel 0 arm64: dts: r8a7795: Add USB3.0 host device nodes arm64: dts: r8a7795: Complete SYS-DMAC nodes Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
commit
efa9b9e39e
@ -93,6 +93,9 @@ &extal_clk {
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};
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&pfc {
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pinctrl-0 = <&scif_clk_pins>;
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pinctrl-names = "default";
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scif1_pins: scif1 {
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renesas,groups = "scif1_data_a", "scif1_ctrl";
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renesas,function = "scif1";
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@ -101,6 +104,10 @@ scif2_pins: scif2 {
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renesas,groups = "scif2_data_a";
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renesas,function = "scif2";
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};
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scif_clk_pins: scif_clk {
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renesas,groups = "scif_clk_a";
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renesas,function = "scif_clk";
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};
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i2c2_pins: i2c2 {
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renesas,groups = "i2c2_a";
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@ -138,6 +145,11 @@ &scif2 {
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status = "okay";
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};
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&scif_clk {
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clock-frequency = <14745600>;
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status = "okay";
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};
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&i2c2 {
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pinctrl-0 = <&i2c2_pins>;
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pinctrl-names = "default";
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@ -249,3 +261,7 @@ phy0: ethernet-phy@0 {
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interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
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};
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};
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&xhci0 {
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status = "okay";
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};
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@ -99,6 +99,14 @@ audio_clk_c: audio_clk_c {
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clock-frequency = <0>;
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};
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/* External SCIF clock - to be overridden by boards that provide it */
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scif_clk: scif {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <0>;
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status = "disabled";
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};
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soc {
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compatible = "simple-bus";
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interrupt-parent = <&gic>;
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@ -333,15 +341,102 @@ pfc: pfc@e6060000 {
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};
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dmac0: dma-controller@e6700000 {
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/* Empty node for now */
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compatible = "renesas,dmac-r8a7795",
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"renesas,rcar-dmac";
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reg = <0 0xe6700000 0 0x10000>;
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interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "error",
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"ch0", "ch1", "ch2", "ch3",
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"ch4", "ch5", "ch6", "ch7",
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"ch8", "ch9", "ch10", "ch11",
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"ch12", "ch13", "ch14", "ch15";
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clocks = <&cpg CPG_MOD 219>;
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clock-names = "fck";
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power-domains = <&cpg>;
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#dma-cells = <1>;
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dma-channels = <16>;
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};
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dmac1: dma-controller@e7300000 {
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/* Empty node for now */
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compatible = "renesas,dmac-r8a7795",
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"renesas,rcar-dmac";
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reg = <0 0xe7300000 0 0x10000>;
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interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "error",
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"ch0", "ch1", "ch2", "ch3",
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"ch4", "ch5", "ch6", "ch7",
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"ch8", "ch9", "ch10", "ch11",
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"ch12", "ch13", "ch14", "ch15";
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clocks = <&cpg CPG_MOD 218>;
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clock-names = "fck";
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power-domains = <&cpg>;
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#dma-cells = <1>;
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dma-channels = <16>;
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};
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dmac2: dma-controller@e7310000 {
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/* Empty node for now */
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compatible = "renesas,dmac-r8a7795",
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"renesas,rcar-dmac";
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reg = <0 0xe7310000 0 0x10000>;
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interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "error",
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"ch0", "ch1", "ch2", "ch3",
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"ch4", "ch5", "ch6", "ch7",
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"ch8", "ch9", "ch10", "ch11",
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"ch12", "ch13", "ch14", "ch15";
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clocks = <&cpg CPG_MOD 217>;
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clock-names = "fck";
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power-domains = <&cpg>;
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#dma-cells = <1>;
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dma-channels = <16>;
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};
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avb: ethernet@e6800000 {
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@ -387,11 +482,15 @@ avb: ethernet@e6800000 {
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};
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hscif0: serial@e6540000 {
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compatible = "renesas,hscif-r8a7795", "renesas,hscif";
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compatible = "renesas,hscif-r8a7795",
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"renesas,rcar-gen3-hscif",
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"renesas,hscif";
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reg = <0 0xe6540000 0 96>;
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interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 520>;
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clock-names = "sci_ick";
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clocks = <&cpg CPG_MOD 520>,
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<&cpg CPG_CORE R8A7795_CLK_S3D1>,
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<&scif_clk>;
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clock-names = "fck", "brg_int", "scif_clk";
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dmas = <&dmac1 0x31>, <&dmac1 0x30>;
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dma-names = "tx", "rx";
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power-domains = <&cpg>;
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@ -399,11 +498,15 @@ hscif0: serial@e6540000 {
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};
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hscif1: serial@e6550000 {
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compatible = "renesas,hscif-r8a7795", "renesas,hscif";
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compatible = "renesas,hscif-r8a7795",
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"renesas,rcar-gen3-hscif",
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"renesas,hscif";
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reg = <0 0xe6550000 0 96>;
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interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 519>;
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clock-names = "sci_ick";
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clocks = <&cpg CPG_MOD 519>,
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<&cpg CPG_CORE R8A7795_CLK_S3D1>,
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<&scif_clk>;
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clock-names = "fck", "brg_int", "scif_clk";
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dmas = <&dmac1 0x33>, <&dmac1 0x32>;
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dma-names = "tx", "rx";
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power-domains = <&cpg>;
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@ -411,11 +514,15 @@ hscif1: serial@e6550000 {
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};
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hscif2: serial@e6560000 {
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compatible = "renesas,hscif-r8a7795", "renesas,hscif";
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compatible = "renesas,hscif-r8a7795",
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"renesas,rcar-gen3-hscif",
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"renesas,hscif";
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reg = <0 0xe6560000 0 96>;
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interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 518>;
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clock-names = "sci_ick";
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clocks = <&cpg CPG_MOD 518>,
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<&cpg CPG_CORE R8A7795_CLK_S3D1>,
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<&scif_clk>;
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clock-names = "fck", "brg_int", "scif_clk";
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dmas = <&dmac1 0x35>, <&dmac1 0x34>;
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dma-names = "tx", "rx";
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power-domains = <&cpg>;
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@ -423,11 +530,15 @@ hscif2: serial@e6560000 {
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};
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hscif3: serial@e66a0000 {
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compatible = "renesas,hscif-r8a7795", "renesas,hscif";
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compatible = "renesas,hscif-r8a7795",
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"renesas,rcar-gen3-hscif",
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"renesas,hscif";
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reg = <0 0xe66a0000 0 96>;
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interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 517>;
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clock-names = "sci_ick";
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clocks = <&cpg CPG_MOD 517>,
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<&cpg CPG_CORE R8A7795_CLK_S3D1>,
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<&scif_clk>;
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clock-names = "fck", "brg_int", "scif_clk";
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dmas = <&dmac0 0x37>, <&dmac0 0x36>;
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dma-names = "tx", "rx";
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power-domains = <&cpg>;
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@ -435,11 +546,15 @@ hscif3: serial@e66a0000 {
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};
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hscif4: serial@e66b0000 {
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compatible = "renesas,hscif-r8a7795", "renesas,hscif";
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compatible = "renesas,hscif-r8a7795",
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"renesas,rcar-gen3-hscif",
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"renesas,hscif";
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reg = <0 0xe66b0000 0 96>;
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interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 516>;
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clock-names = "sci_ick";
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clocks = <&cpg CPG_MOD 516>,
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<&cpg CPG_CORE R8A7795_CLK_S3D1>,
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<&scif_clk>;
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clock-names = "fck", "brg_int", "scif_clk";
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dmas = <&dmac0 0x39>, <&dmac0 0x38>;
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dma-names = "tx", "rx";
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power-domains = <&cpg>;
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@ -447,11 +562,14 @@ hscif4: serial@e66b0000 {
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};
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scif0: serial@e6e60000 {
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compatible = "renesas,scif-r8a7795", "renesas,scif";
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compatible = "renesas,scif-r8a7795",
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"renesas,rcar-gen3-scif", "renesas,scif";
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reg = <0 0xe6e60000 0 64>;
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interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 207>;
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clock-names = "sci_ick";
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clocks = <&cpg CPG_MOD 207>,
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<&cpg CPG_CORE R8A7795_CLK_S3D1>,
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<&scif_clk>;
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clock-names = "fck", "brg_int", "scif_clk";
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dmas = <&dmac1 0x51>, <&dmac1 0x50>;
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dma-names = "tx", "rx";
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power-domains = <&cpg>;
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@ -459,11 +577,14 @@ scif0: serial@e6e60000 {
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};
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scif1: serial@e6e68000 {
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compatible = "renesas,scif-r8a7795", "renesas,scif";
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compatible = "renesas,scif-r8a7795",
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"renesas,rcar-gen3-scif", "renesas,scif";
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reg = <0 0xe6e68000 0 64>;
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interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 206>;
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clock-names = "sci_ick";
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clocks = <&cpg CPG_MOD 206>,
|
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<&cpg CPG_CORE R8A7795_CLK_S3D1>,
|
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<&scif_clk>;
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clock-names = "fck", "brg_int", "scif_clk";
|
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dmas = <&dmac1 0x53>, <&dmac1 0x52>;
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dma-names = "tx", "rx";
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power-domains = <&cpg>;
|
||||
@ -471,11 +592,14 @@ scif1: serial@e6e68000 {
|
||||
};
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||||
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||||
scif2: serial@e6e88000 {
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compatible = "renesas,scif-r8a7795", "renesas,scif";
|
||||
compatible = "renesas,scif-r8a7795",
|
||||
"renesas,rcar-gen3-scif", "renesas,scif";
|
||||
reg = <0 0xe6e88000 0 64>;
|
||||
interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 310>;
|
||||
clock-names = "sci_ick";
|
||||
clocks = <&cpg CPG_MOD 310>,
|
||||
<&cpg CPG_CORE R8A7795_CLK_S3D1>,
|
||||
<&scif_clk>;
|
||||
clock-names = "fck", "brg_int", "scif_clk";
|
||||
dmas = <&dmac1 0x13>, <&dmac1 0x12>;
|
||||
dma-names = "tx", "rx";
|
||||
power-domains = <&cpg>;
|
||||
@ -483,11 +607,14 @@ scif2: serial@e6e88000 {
|
||||
};
|
||||
|
||||
scif3: serial@e6c50000 {
|
||||
compatible = "renesas,scif-r8a7795", "renesas,scif";
|
||||
compatible = "renesas,scif-r8a7795",
|
||||
"renesas,rcar-gen3-scif", "renesas,scif";
|
||||
reg = <0 0xe6c50000 0 64>;
|
||||
interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 204>;
|
||||
clock-names = "sci_ick";
|
||||
clocks = <&cpg CPG_MOD 204>,
|
||||
<&cpg CPG_CORE R8A7795_CLK_S3D1>,
|
||||
<&scif_clk>;
|
||||
clock-names = "fck", "brg_int", "scif_clk";
|
||||
dmas = <&dmac0 0x57>, <&dmac0 0x56>;
|
||||
dma-names = "tx", "rx";
|
||||
power-domains = <&cpg>;
|
||||
@ -495,11 +622,14 @@ scif3: serial@e6c50000 {
|
||||
};
|
||||
|
||||
scif4: serial@e6c40000 {
|
||||
compatible = "renesas,scif-r8a7795", "renesas,scif";
|
||||
compatible = "renesas,scif-r8a7795",
|
||||
"renesas,rcar-gen3-scif", "renesas,scif";
|
||||
reg = <0 0xe6c40000 0 64>;
|
||||
interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 203>;
|
||||
clock-names = "sci_ick";
|
||||
clocks = <&cpg CPG_MOD 203>,
|
||||
<&cpg CPG_CORE R8A7795_CLK_S3D1>,
|
||||
<&scif_clk>;
|
||||
clock-names = "fck", "brg_int", "scif_clk";
|
||||
dmas = <&dmac0 0x59>, <&dmac0 0x58>;
|
||||
dma-names = "tx", "rx";
|
||||
power-domains = <&cpg>;
|
||||
@ -507,11 +637,14 @@ scif4: serial@e6c40000 {
|
||||
};
|
||||
|
||||
scif5: serial@e6f30000 {
|
||||
compatible = "renesas,scif-r8a7795", "renesas,scif";
|
||||
compatible = "renesas,scif-r8a7795",
|
||||
"renesas,rcar-gen3-scif", "renesas,scif";
|
||||
reg = <0 0xe6f30000 0 64>;
|
||||
interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 202>;
|
||||
clock-names = "sci_ick";
|
||||
clocks = <&cpg CPG_MOD 202>,
|
||||
<&cpg CPG_CORE R8A7795_CLK_S3D1>,
|
||||
<&scif_clk>;
|
||||
clock-names = "fck", "brg_int", "scif_clk";
|
||||
dmas = <&dmac1 0x5b>, <&dmac1 0x5a>;
|
||||
dma-names = "tx", "rx";
|
||||
power-domains = <&cpg>;
|
||||
@ -775,5 +908,49 @@ sata: sata@ee300000 {
|
||||
clocks = <&cpg CPG_MOD 815>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
xhci0: usb@ee000000 {
|
||||
compatible = "renesas,xhci-r8a7795";
|
||||
reg = <0 0xee000000 0 0xc00>;
|
||||
interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 328>;
|
||||
power-domains = <&cpg>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
xhci1: usb@ee0400000 {
|
||||
compatible = "renesas,xhci-r8a7795";
|
||||
reg = <0 0xee040000 0 0xc00>;
|
||||
interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 327>;
|
||||
power-domains = <&cpg>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usb_dmac0: dma-controller@e65a0000 {
|
||||
compatible = "renesas,r8a7795-usb-dmac",
|
||||
"renesas,usb-dmac";
|
||||
reg = <0 0xe65a0000 0 0x100>;
|
||||
interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "ch0", "ch1";
|
||||
clocks = <&cpg CPG_MOD 330>;
|
||||
power-domains = <&cpg>;
|
||||
#dma-cells = <1>;
|
||||
dma-channels = <2>;
|
||||
};
|
||||
|
||||
usb_dmac1: dma-controller@e65b0000 {
|
||||
compatible = "renesas,r8a7795-usb-dmac",
|
||||
"renesas,usb-dmac";
|
||||
reg = <0 0xe65b0000 0 0x100>;
|
||||
interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "ch0", "ch1";
|
||||
clocks = <&cpg CPG_MOD 331>;
|
||||
power-domains = <&cpg>;
|
||||
#dma-cells = <1>;
|
||||
dma-channels = <2>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
Loading…
Reference in New Issue
Block a user