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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-11 17:26:43 +07:00
cxgb4: Add support for mps_tcam debugfs
Debug log to get the MPS TCAM table Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Hariprasad Shenai
David S. Miller
parent
74b3092c45
commit
ef82f662ba
@ -433,6 +433,136 @@ static const struct file_operations devlog_fops = {
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.release = seq_release_private
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};
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static inline void tcamxy2valmask(u64 x, u64 y, u8 *addr, u64 *mask)
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{
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*mask = x | y;
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y = (__force u64)cpu_to_be64(y);
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memcpy(addr, (char *)&y + 2, ETH_ALEN);
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}
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static int mps_tcam_show(struct seq_file *seq, void *v)
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{
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if (v == SEQ_START_TOKEN)
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seq_puts(seq, "Idx Ethernet address Mask Vld Ports PF"
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" VF Replication "
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"P0 P1 P2 P3 ML\n");
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else {
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u64 mask;
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u8 addr[ETH_ALEN];
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struct adapter *adap = seq->private;
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unsigned int idx = (uintptr_t)v - 2;
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u64 tcamy = t4_read_reg64(adap, MPS_CLS_TCAM_Y_L(idx));
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u64 tcamx = t4_read_reg64(adap, MPS_CLS_TCAM_X_L(idx));
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u32 cls_lo = t4_read_reg(adap, MPS_CLS_SRAM_L(idx));
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u32 cls_hi = t4_read_reg(adap, MPS_CLS_SRAM_H(idx));
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u32 rplc[4] = {0, 0, 0, 0};
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if (tcamx & tcamy) {
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seq_printf(seq, "%3u -\n", idx);
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goto out;
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}
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if (cls_lo & REPLICATE_F) {
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struct fw_ldst_cmd ldst_cmd;
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int ret;
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memset(&ldst_cmd, 0, sizeof(ldst_cmd));
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ldst_cmd.op_to_addrspace =
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htonl(FW_CMD_OP_V(FW_LDST_CMD) |
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FW_CMD_REQUEST_F |
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FW_CMD_READ_F |
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FW_LDST_CMD_ADDRSPACE_V(
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FW_LDST_ADDRSPC_MPS));
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ldst_cmd.cycles_to_len16 = htonl(FW_LEN16(ldst_cmd));
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ldst_cmd.u.mps.fid_ctl =
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htons(FW_LDST_CMD_FID_V(FW_LDST_MPS_RPLC) |
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FW_LDST_CMD_CTL_V(idx));
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ret = t4_wr_mbox(adap, adap->mbox, &ldst_cmd,
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sizeof(ldst_cmd), &ldst_cmd);
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if (ret)
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dev_warn(adap->pdev_dev, "Can't read MPS "
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"replication map for idx %d: %d\n",
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idx, -ret);
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else {
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rplc[0] = ntohl(ldst_cmd.u.mps.rplc31_0);
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rplc[1] = ntohl(ldst_cmd.u.mps.rplc63_32);
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rplc[2] = ntohl(ldst_cmd.u.mps.rplc95_64);
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rplc[3] = ntohl(ldst_cmd.u.mps.rplc127_96);
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}
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}
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tcamxy2valmask(tcamx, tcamy, addr, &mask);
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seq_printf(seq, "%3u %02x:%02x:%02x:%02x:%02x:%02x %012llx"
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"%3c %#x%4u%4d",
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idx, addr[0], addr[1], addr[2], addr[3], addr[4],
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addr[5], (unsigned long long)mask,
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(cls_lo & SRAM_VLD_F) ? 'Y' : 'N', PORTMAP_G(cls_hi),
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PF_G(cls_lo),
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(cls_lo & VF_VALID_F) ? VF_G(cls_lo) : -1);
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if (cls_lo & REPLICATE_F)
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seq_printf(seq, " %08x %08x %08x %08x",
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rplc[3], rplc[2], rplc[1], rplc[0]);
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else
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seq_printf(seq, "%36c", ' ');
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seq_printf(seq, "%4u%3u%3u%3u %#x\n",
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SRAM_PRIO0_G(cls_lo), SRAM_PRIO1_G(cls_lo),
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SRAM_PRIO2_G(cls_lo), SRAM_PRIO3_G(cls_lo),
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(cls_lo >> MULTILISTEN0_S) & 0xf);
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}
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out: return 0;
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}
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static inline void *mps_tcam_get_idx(struct seq_file *seq, loff_t pos)
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{
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struct adapter *adap = seq->private;
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int max_mac_addr = is_t4(adap->params.chip) ?
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NUM_MPS_CLS_SRAM_L_INSTANCES :
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NUM_MPS_T5_CLS_SRAM_L_INSTANCES;
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return ((pos <= max_mac_addr) ? (void *)(uintptr_t)(pos + 1) : NULL);
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}
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static void *mps_tcam_start(struct seq_file *seq, loff_t *pos)
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{
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return *pos ? mps_tcam_get_idx(seq, *pos) : SEQ_START_TOKEN;
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}
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static void *mps_tcam_next(struct seq_file *seq, void *v, loff_t *pos)
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{
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++*pos;
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return mps_tcam_get_idx(seq, *pos);
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}
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static void mps_tcam_stop(struct seq_file *seq, void *v)
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{
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}
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static const struct seq_operations mps_tcam_seq_ops = {
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.start = mps_tcam_start,
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.next = mps_tcam_next,
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.stop = mps_tcam_stop,
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.show = mps_tcam_show
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};
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static int mps_tcam_open(struct inode *inode, struct file *file)
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{
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int res = seq_open(file, &mps_tcam_seq_ops);
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if (!res) {
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struct seq_file *seq = file->private_data;
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seq->private = inode->i_private;
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}
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return res;
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}
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static const struct file_operations mps_tcam_debugfs_fops = {
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.owner = THIS_MODULE,
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.open = mps_tcam_open,
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.read = seq_read,
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.llseek = seq_lseek,
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.release = seq_release,
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};
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static ssize_t mem_read(struct file *file, char __user *buf, size_t count,
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loff_t *ppos)
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{
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@ -515,6 +645,7 @@ int t4_setup_debugfs(struct adapter *adap)
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{ "cim_qcfg", &cim_qcfg_fops, S_IRUSR, 0 },
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{ "devlog", &devlog_fops, S_IRUSR, 0 },
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{ "l2t", &t4_l2t_fops, S_IRUSR, 0},
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{ "mps_tcam", &mps_tcam_debugfs_fops, S_IRUSR, 0 },
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};
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add_debugfs_files(adap,
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@ -1708,6 +1708,66 @@
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#define MPS_RX_PERR_INT_CAUSE_A 0x11074
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#define MPS_CLS_TCAM_Y_L_A 0xf000
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#define MPS_CLS_TCAM_X_L_A 0xf008
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#define MPS_CLS_TCAM_Y_L(idx) (MPS_CLS_TCAM_Y_L_A + (idx) * 16)
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#define NUM_MPS_CLS_TCAM_Y_L_INSTANCES 512
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#define MPS_CLS_TCAM_X_L(idx) (MPS_CLS_TCAM_X_L_A + (idx) * 16)
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#define NUM_MPS_CLS_TCAM_X_L_INSTANCES 512
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#define MPS_CLS_SRAM_L_A 0xe000
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#define MPS_CLS_SRAM_H_A 0xe004
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#define MPS_CLS_SRAM_L(idx) (MPS_CLS_SRAM_L_A + (idx) * 8)
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#define NUM_MPS_CLS_SRAM_L_INSTANCES 336
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#define MPS_CLS_SRAM_H(idx) (MPS_CLS_SRAM_H_A + (idx) * 8)
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#define NUM_MPS_CLS_SRAM_H_INSTANCES 336
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#define MULTILISTEN0_S 25
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#define REPLICATE_S 11
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#define REPLICATE_V(x) ((x) << REPLICATE_S)
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#define REPLICATE_F REPLICATE_V(1U)
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#define PF_S 8
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#define PF_M 0x7U
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#define PF_G(x) (((x) >> PF_S) & PF_M)
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#define VF_VALID_S 7
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#define VF_VALID_V(x) ((x) << VF_VALID_S)
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#define VF_VALID_F VF_VALID_V(1U)
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#define VF_S 0
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#define VF_M 0x7fU
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#define VF_G(x) (((x) >> VF_S) & VF_M)
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#define SRAM_PRIO3_S 22
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#define SRAM_PRIO3_M 0x7U
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#define SRAM_PRIO3_G(x) (((x) >> SRAM_PRIO3_S) & SRAM_PRIO3_M)
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#define SRAM_PRIO2_S 19
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#define SRAM_PRIO2_M 0x7U
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#define SRAM_PRIO2_G(x) (((x) >> SRAM_PRIO2_S) & SRAM_PRIO2_M)
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#define SRAM_PRIO1_S 16
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#define SRAM_PRIO1_M 0x7U
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#define SRAM_PRIO1_G(x) (((x) >> SRAM_PRIO1_S) & SRAM_PRIO1_M)
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#define SRAM_PRIO0_S 13
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#define SRAM_PRIO0_M 0x7U
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#define SRAM_PRIO0_G(x) (((x) >> SRAM_PRIO0_S) & SRAM_PRIO0_M)
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#define SRAM_VLD_S 12
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#define SRAM_VLD_V(x) ((x) << SRAM_VLD_S)
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#define SRAM_VLD_F SRAM_VLD_V(1U)
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#define PORTMAP_S 0
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#define PORTMAP_M 0xfU
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#define PORTMAP_G(x) (((x) >> PORTMAP_S) & PORTMAP_M)
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#define CPL_INTR_CAUSE_A 0x19054
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#define CIM_OP_MAP_PERR_S 5
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