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Documentation: add Device tree bindings for Hisilicon hip04 ethernet

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This patch adds the Device Tree bindings for the Hisilicon hip04
Ethernet controller, including 100M / 1000M controller.

Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org>
Signed-off-by: Ding Tianhong <dingtianhong@huawei.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Zhangfei Gao 2015-01-14 14:34:12 +08:00 committed by David S. Miller
parent 3ff13f1c62
commit ef80c32dd0
1 changed files with 88 additions and 0 deletions
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Documentation/devicetree/bindings/net/hisilicon-hip04-net.txt Normal file
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Hisilicon hip04 Ethernet Controller
* Ethernet controller node
Required properties:
- compatible: should be "hisilicon,hip04-mac".
- reg: address and length of the register set for the device.
- interrupts: interrupt for the device.
- port-handle: <phandle port channel>
phandle, specifies a reference to the syscon ppe node
port, port number connected to the controller
channel, recv channel start from channel * number (RX_DESC_NUM)
- phy-mode: see ethernet.txt [1].
Optional properties:
- phy-handle: see ethernet.txt [1].
[1] Documentation/devicetree/bindings/net/ethernet.txt
* Ethernet ppe node:
Control rx & tx fifos of all ethernet controllers.
Have 2048 recv channels shared by all ethernet controllers, only if no overlap.
Each controller's recv channel start from channel * number (RX_DESC_NUM).
Required properties:
- compatible: "hisilicon,hip04-ppe", "syscon".
- reg: address and length of the register set for the device.
* MDIO bus node:
Required properties:
- compatible: should be "hisilicon,hip04-mdio".
- Inherits from MDIO bus node binding [2]
[2] Documentation/devicetree/bindings/net/phy.txt
Example:
mdio {
compatible = "hisilicon,hip04-mdio";
reg = <0x28f1000 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
phy0: ethernet-phy@0 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <0>;
marvell,reg-init = <18 0x14 0 0x8001>;
};
phy1: ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <1>;
marvell,reg-init = <18 0x14 0 0x8001>;
};
};
ppe: ppe@28c0000 {
compatible = "hisilicon,hip04-ppe", "syscon";
reg = <0x28c0000 0x10000>;
};
fe: ethernet@28b0000 {
compatible = "hisilicon,hip04-mac";
reg = <0x28b0000 0x10000>;
interrupts = <0 413 4>;
phy-mode = "mii";
port-handle = <&ppe 31 0>;
};
ge0: ethernet@2800000 {
compatible = "hisilicon,hip04-mac";
reg = <0x2800000 0x10000>;
interrupts = <0 402 4>;
phy-mode = "sgmii";
port-handle = <&ppe 0 1>;
phy-handle = <&phy0>;
};
ge8: ethernet@2880000 {
compatible = "hisilicon,hip04-mac";
reg = <0x2880000 0x10000>;
interrupts = <0 410 4>;
phy-mode = "sgmii";
port-handle = <&ppe 8 2>;
phy-handle = <&phy1>;
};