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soc: renesas: rcar-sysc: Add support for R-Car D3 power areas
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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@ -17,6 +17,7 @@ Required properties:
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- "renesas,r8a7794-sysc" (R-Car E2)
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- "renesas,r8a7795-sysc" (R-Car H3)
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- "renesas,r8a7796-sysc" (R-Car M3-W)
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- "renesas,r8a77995-sysc" (R-Car D3)
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- reg: Address start and address range for the device.
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- #power-domain-cells: Must be 1.
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@ -13,6 +13,7 @@ config SOC_RENESAS
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select SYSC_R8A7794 if ARCH_R8A7794
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select SYSC_R8A7795 if ARCH_R8A7795
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select SYSC_R8A7796 if ARCH_R8A7796
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select SYSC_R8A77995 if ARCH_R8A77995
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if SOC_RENESAS
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@ -53,6 +54,10 @@ config SYSC_R8A7796
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bool "R-Car M3-W System Controller support" if COMPILE_TEST
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select SYSC_RCAR
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config SYSC_R8A77995
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bool "R-Car D3 System Controller support" if COMPILE_TEST
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select SYSC_RCAR
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# Family
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config RST_RCAR
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bool "R-Car Reset Controller support" if COMPILE_TEST
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@ -11,6 +11,7 @@ obj-$(CONFIG_SYSC_R8A7792) += r8a7792-sysc.o
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obj-$(CONFIG_SYSC_R8A7794) += r8a7794-sysc.o
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obj-$(CONFIG_SYSC_R8A7795) += r8a7795-sysc.o
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obj-$(CONFIG_SYSC_R8A7796) += r8a7796-sysc.o
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obj-$(CONFIG_SYSC_R8A77995) += r8a77995-sysc.o
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# Family
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obj-$(CONFIG_RST_RCAR) += rcar-rst.o
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31
drivers/soc/renesas/r8a77995-sysc.c
Normal file
31
drivers/soc/renesas/r8a77995-sysc.c
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@ -0,0 +1,31 @@
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/*
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* Renesas R-Car D3 System Controller
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*
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* Copyright (C) 2017 Glider bvba
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*/
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#include <linux/bug.h>
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#include <linux/kernel.h>
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#include <linux/sys_soc.h>
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#include <dt-bindings/power/r8a77995-sysc.h>
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#include "rcar-sysc.h"
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static struct rcar_sysc_area r8a77995_areas[] __initdata = {
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{ "always-on", 0, 0, R8A77995_PD_ALWAYS_ON, -1, PD_ALWAYS_ON },
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{ "ca53-scu", 0x140, 0, R8A77995_PD_CA53_SCU, R8A77995_PD_ALWAYS_ON,
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PD_SCU },
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{ "ca53-cpu0", 0x200, 0, R8A77995_PD_CA53_CPU0, R8A77995_PD_CA53_SCU,
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PD_CPU_NOCR },
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};
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const struct rcar_sysc_info r8a77995_sysc_info __initconst = {
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.areas = r8a77995_areas,
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.num_areas = ARRAY_SIZE(r8a77995_areas),
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};
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@ -283,6 +283,9 @@ static const struct of_device_id rcar_sysc_matches[] = {
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#endif
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#ifdef CONFIG_SYSC_R8A7796
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{ .compatible = "renesas,r8a7796-sysc", .data = &r8a7796_sysc_info },
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#endif
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#ifdef CONFIG_SYSC_R8A77995
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{ .compatible = "renesas,r8a77995-sysc", .data = &r8a77995_sysc_info },
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#endif
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{ /* sentinel */ }
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};
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@ -58,6 +58,7 @@ extern const struct rcar_sysc_info r8a7792_sysc_info;
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extern const struct rcar_sysc_info r8a7794_sysc_info;
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extern const struct rcar_sysc_info r8a7795_sysc_info;
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extern const struct rcar_sysc_info r8a7796_sysc_info;
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extern const struct rcar_sysc_info r8a77995_sysc_info;
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/*
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