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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-27 06:30:56 +07:00
drm/gf104/gr: rename gf104 (nvc4), it came before gf106 (nvc3)
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
This commit is contained in:
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6acc09b99d
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eeb0558e07
@ -249,7 +249,7 @@ nouveau-y += core/engine/graph/ctxnv40.o
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nouveau-y += core/engine/graph/ctxnv50.o
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nouveau-y += core/engine/graph/ctxnvc0.o
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nouveau-y += core/engine/graph/ctxnvc1.o
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nouveau-y += core/engine/graph/ctxnvc3.o
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nouveau-y += core/engine/graph/ctxnvc4.o
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nouveau-y += core/engine/graph/ctxnvc8.o
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nouveau-y += core/engine/graph/ctxnvd7.o
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nouveau-y += core/engine/graph/ctxnvd9.o
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@ -268,7 +268,7 @@ nouveau-y += core/engine/graph/nv40.o
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nouveau-y += core/engine/graph/nv50.o
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nouveau-y += core/engine/graph/nvc0.o
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nouveau-y += core/engine/graph/nvc1.o
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nouveau-y += core/engine/graph/nvc3.o
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nouveau-y += core/engine/graph/nvc4.o
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nouveau-y += core/engine/graph/nvc8.o
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nouveau-y += core/engine/graph/nvd7.o
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nouveau-y += core/engine/graph/nvd9.o
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@ -112,7 +112,7 @@ nvc0_identify(struct nouveau_device *device)
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device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nvc0_dmaeng_oclass;
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device->oclass[NVDEV_ENGINE_FIFO ] = nvc0_fifo_oclass;
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device->oclass[NVDEV_ENGINE_SW ] = nvc0_software_oclass;
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device->oclass[NVDEV_ENGINE_GR ] = nvc3_graph_oclass;
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device->oclass[NVDEV_ENGINE_GR ] = nvc4_graph_oclass;
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device->oclass[NVDEV_ENGINE_VP ] = &nvc0_vp_oclass;
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device->oclass[NVDEV_ENGINE_BSP ] = &nvc0_bsp_oclass;
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device->oclass[NVDEV_ENGINE_PPP ] = &nvc0_ppp_oclass;
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@ -144,7 +144,7 @@ nvc0_identify(struct nouveau_device *device)
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device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nvc0_dmaeng_oclass;
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device->oclass[NVDEV_ENGINE_FIFO ] = nvc0_fifo_oclass;
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device->oclass[NVDEV_ENGINE_SW ] = nvc0_software_oclass;
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device->oclass[NVDEV_ENGINE_GR ] = nvc3_graph_oclass;
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device->oclass[NVDEV_ENGINE_GR ] = nvc4_graph_oclass;
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device->oclass[NVDEV_ENGINE_VP ] = &nvc0_vp_oclass;
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device->oclass[NVDEV_ENGINE_BSP ] = &nvc0_bsp_oclass;
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device->oclass[NVDEV_ENGINE_PPP ] = &nvc0_ppp_oclass;
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@ -175,7 +175,7 @@ nvc0_identify(struct nouveau_device *device)
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device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nvc0_dmaeng_oclass;
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device->oclass[NVDEV_ENGINE_FIFO ] = nvc0_fifo_oclass;
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device->oclass[NVDEV_ENGINE_SW ] = nvc0_software_oclass;
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device->oclass[NVDEV_ENGINE_GR ] = nvc3_graph_oclass;
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device->oclass[NVDEV_ENGINE_GR ] = nvc4_graph_oclass;
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device->oclass[NVDEV_ENGINE_VP ] = &nvc0_vp_oclass;
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device->oclass[NVDEV_ENGINE_BSP ] = &nvc0_bsp_oclass;
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device->oclass[NVDEV_ENGINE_PPP ] = &nvc0_ppp_oclass;
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@ -207,7 +207,7 @@ nvc0_identify(struct nouveau_device *device)
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device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nvc0_dmaeng_oclass;
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device->oclass[NVDEV_ENGINE_FIFO ] = nvc0_fifo_oclass;
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device->oclass[NVDEV_ENGINE_SW ] = nvc0_software_oclass;
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device->oclass[NVDEV_ENGINE_GR ] = nvc3_graph_oclass;
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device->oclass[NVDEV_ENGINE_GR ] = nvc4_graph_oclass;
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device->oclass[NVDEV_ENGINE_VP ] = &nvc0_vp_oclass;
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device->oclass[NVDEV_ENGINE_BSP ] = &nvc0_bsp_oclass;
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device->oclass[NVDEV_ENGINE_PPP ] = &nvc0_ppp_oclass;
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@ -25,7 +25,7 @@
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#include "nvc0.h"
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static struct nvc0_graph_init
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nvc3_grctx_init_tpc[] = {
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nvc4_grctx_init_tpc[] = {
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{ 0x419818, 1, 0x04, 0x00000000 },
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{ 0x41983c, 1, 0x04, 0x00038bc7 },
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{ 0x419848, 1, 0x04, 0x00000000 },
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@ -71,15 +71,15 @@ nvc3_grctx_init_tpc[] = {
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};
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struct nvc0_graph_init *
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nvc3_grctx_init_gpc[] = {
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nvc4_grctx_init_gpc[] = {
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nvc0_grctx_init_gpc_0,
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nvc0_grctx_init_gpc_1,
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nvc3_grctx_init_tpc,
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nvc4_grctx_init_tpc,
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NULL
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};
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struct nouveau_oclass *
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nvc3_grctx_oclass = &(struct nvc0_grctx_oclass) {
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nvc4_grctx_oclass = &(struct nvc0_grctx_oclass) {
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.base.handle = NV_ENGCTX(GR, 0xc3),
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.base.ofuncs = &(struct nouveau_ofuncs) {
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.ctor = nvc0_graph_context_ctor,
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@ -93,7 +93,7 @@ nvc3_grctx_oclass = &(struct nvc0_grctx_oclass) {
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.mods = nvc0_grctx_generate_mods,
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.unkn = nvc0_grctx_generate_unkn,
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.hub = nvc0_grctx_init_hub,
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.gpc = nvc3_grctx_init_gpc,
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.gpc = nvc4_grctx_init_gpc,
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.icmd = nvc0_grctx_init_icmd,
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.mthd = nvc0_grctx_init_mthd,
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}.base;
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@ -196,7 +196,7 @@ extern struct nvc0_graph_init nvc0_graph_init_gpc[];
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extern struct nvc0_graph_init nvc0_graph_init_unk88xx[];
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extern struct nvc0_graph_init nvc0_graph_tpc_0[];
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extern struct nvc0_graph_init nvc3_graph_init_unk58xx[];
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extern struct nvc0_graph_init nvc4_graph_init_unk58xx[];
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extern struct nvc0_graph_init nvd9_graph_init_unk58xx[];
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extern struct nvc0_graph_init nvd9_graph_init_unk64xx[];
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@ -249,7 +249,7 @@ void nvc1_grctx_generate_unkn(struct nvc0_graph_priv *);
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extern struct nouveau_oclass *nvc1_grctx_oclass;
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extern struct nvc0_graph_init nvc1_grctx_init_9097[];
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extern struct nouveau_oclass *nvc3_grctx_oclass;
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extern struct nouveau_oclass *nvc4_grctx_oclass;
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extern struct nouveau_oclass *nvc8_grctx_oclass;
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extern struct nvc0_graph_init nvc8_grctx_init_9197[];
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@ -118,7 +118,7 @@ nvc1_graph_init_mmio[] = {
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nvc0_graph_init_unk44xx,
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nvc0_graph_init_unk78xx,
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nvc0_graph_init_unk60xx,
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nvc3_graph_init_unk58xx,
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nvc4_graph_init_unk58xx,
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nvc0_graph_init_unk80xx,
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nvc1_graph_init_gpc,
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nvc1_graph_init_tpc,
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@ -29,7 +29,7 @@
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******************************************************************************/
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struct nvc0_graph_init
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nvc3_graph_init_unk58xx[] = {
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nvc4_graph_init_unk58xx[] = {
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{ 0x405844, 1, 0x04, 0x00ffffff },
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{ 0x405850, 1, 0x04, 0x00000000 },
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{ 0x405900, 1, 0x04, 0x00002834 },
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@ -38,7 +38,7 @@ nvc3_graph_init_unk58xx[] = {
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};
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static struct nvc0_graph_init
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nvc3_graph_init_tpc[] = {
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nvc4_graph_init_tpc[] = {
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{ 0x419d08, 2, 0x04, 0x00000000 },
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{ 0x419d10, 1, 0x04, 0x00000014 },
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{ 0x419ab0, 1, 0x04, 0x00000000 },
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@ -78,23 +78,23 @@ nvc3_graph_init_tpc[] = {
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};
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static struct nvc0_graph_init *
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nvc3_graph_init_mmio[] = {
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nvc4_graph_init_mmio[] = {
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nvc0_graph_init_regs,
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nvc0_graph_init_unk40xx,
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nvc0_graph_init_unk44xx,
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nvc0_graph_init_unk78xx,
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nvc0_graph_init_unk60xx,
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nvc3_graph_init_unk58xx,
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nvc4_graph_init_unk58xx,
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nvc0_graph_init_unk80xx,
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nvc0_graph_init_gpc,
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nvc3_graph_init_tpc,
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nvc4_graph_init_tpc,
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nvc0_graph_init_unk88xx,
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nvc0_graph_tpc_0,
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NULL
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};
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struct nouveau_oclass *
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nvc3_graph_oclass = &(struct nvc0_graph_oclass) {
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nvc4_graph_oclass = &(struct nvc0_graph_oclass) {
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.base.handle = NV_ENGINE(GR, 0xc3),
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.base.ofuncs = &(struct nouveau_ofuncs) {
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.ctor = nvc0_graph_ctor,
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@ -102,9 +102,9 @@ nvc3_graph_oclass = &(struct nvc0_graph_oclass) {
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.init = nvc0_graph_init,
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.fini = _nouveau_graph_fini,
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},
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.cclass = &nvc3_grctx_oclass,
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.cclass = &nvc4_grctx_oclass,
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.sclass = nvc0_graph_sclass,
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.mmio = nvc3_graph_init_mmio,
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.mmio = nvc4_graph_init_mmio,
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.fecs.ucode = &nvc0_graph_fecs_ucode,
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.gpccs.ucode = &nvc0_graph_gpccs_ucode,
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}.base;
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@ -63,7 +63,7 @@ extern struct nouveau_oclass nv40_graph_oclass;
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extern struct nouveau_oclass nv50_graph_oclass;
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extern struct nouveau_oclass *nvc0_graph_oclass;
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extern struct nouveau_oclass *nvc1_graph_oclass;
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extern struct nouveau_oclass *nvc3_graph_oclass;
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extern struct nouveau_oclass *nvc4_graph_oclass;
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extern struct nouveau_oclass *nvc8_graph_oclass;
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extern struct nouveau_oclass *nvd7_graph_oclass;
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extern struct nouveau_oclass *nvd9_graph_oclass;
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