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drm/amdgpu: fix max_entries calculation v4
Calculate the correct value for max_entries or we might run after the
page_address array.
v2: Xinhui pointed out we don't need the shift
v3: use local copy of start and simplify some calculation
v4: fix the case that we map less VA range than BO size
Signed-off-by: Christian König <christian.koenig@amd.com>
Fixes: 1e691e2444
drm/amdgpu: stop allocating dummy GTT nodes
Reviewed-by: xinhui pan <xinhui.pan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -1693,13 +1693,13 @@ static int amdgpu_vm_bo_split_mapping(struct amdgpu_device *adev,
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uint64_t max_entries;
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uint64_t addr, last;
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max_entries = mapping->last - start + 1;
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if (nodes) {
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addr = nodes->start << PAGE_SHIFT;
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max_entries = (nodes->size - pfn) *
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AMDGPU_GPU_PAGES_IN_CPU_PAGE;
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max_entries = min((nodes->size - pfn) *
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AMDGPU_GPU_PAGES_IN_CPU_PAGE, max_entries);
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} else {
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addr = 0;
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max_entries = S64_MAX;
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}
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if (pages_addr) {
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@ -1729,7 +1729,7 @@ static int amdgpu_vm_bo_split_mapping(struct amdgpu_device *adev,
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addr += pfn << PAGE_SHIFT;
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}
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last = min((uint64_t)mapping->last, start + max_entries - 1);
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last = start + max_entries - 1;
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r = amdgpu_vm_bo_update_mapping(adev, vm, false, false, resv,
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start, last, flags, addr,
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dma_addr, fence);
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