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iwlwifi: pcie: set LTR to avoid completion timeout

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On some platforms, the preset values aren't correct and then we may
get a completion timeout in the firmware. Change the LTR configuration
to avoid that. The firmware will do some more complex reinit of this
later, but for the boot process we use ~250usec.

Signed-off-by: Johannes Berg <johannes.berg@intel.com>
Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
Link: https://lore.kernel.org/r/iwlwifi.20201107104557.d83d591c05ba.I42885c9fb500bc08b9a4c07c4ff3d436cc7a3c84@changeid
This commit is contained in:
Johannes Berg 2020-11-07 10:50:10 +02:00 committed by Kalle Valo
parent 97cc16943f
commit edb625208d
2 changed files with 30 additions and 0 deletions
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10
drivers/net/wireless/intel/iwlwifi/iwl-csr.h
View File

@ -147,6 +147,16 @@
#define CSR_MAC_SHADOW_REG_CTL2 (CSR_BASE + 0x0AC)
#define CSR_MAC_SHADOW_REG_CTL2_RX_WAKE 0xFFFF
/* LTR control (since IWL_DEVICE_FAMILY_22000) */
#define CSR_LTR_LONG_VAL_AD (CSR_BASE + 0x0D4)
#define CSR_LTR_LONG_VAL_AD_NO_SNOOP_REQ 0x80000000
#define CSR_LTR_LONG_VAL_AD_NO_SNOOP_SCALE 0x1c000000
#define CSR_LTR_LONG_VAL_AD_NO_SNOOP_VAL 0x03ff0000
#define CSR_LTR_LONG_VAL_AD_SNOOP_REQ 0x00008000
#define CSR_LTR_LONG_VAL_AD_SNOOP_SCALE 0x00001c00
#define CSR_LTR_LONG_VAL_AD_SNOOP_VAL 0x000003ff
#define CSR_LTR_LONG_VAL_AD_SCALE_USEC 2
/* GIO Chicken Bits (PCI Express bus link power management) */
#define CSR_GIO_CHICKEN_BITS (CSR_BASE+0x100)

20
drivers/net/wireless/intel/iwlwifi/pcie/ctxt-info-gen3.c
View File

@ -252,6 +252,26 @@ int iwl_pcie_ctxt_info_gen3_init(struct iwl_trans *trans,
iwl_set_bit(trans, CSR_CTXT_INFO_BOOT_CTRL,
CSR_AUTO_FUNC_BOOT_ENA);
if (trans->trans_cfg->device_family == IWL_DEVICE_FAMILY_AX210) {
/*
* The firmware initializes this again later (to a smaller
* value), but for the boot process initialize the LTR to
* ~250 usec.
*/
u32 val = CSR_LTR_LONG_VAL_AD_NO_SNOOP_REQ |
u32_encode_bits(CSR_LTR_LONG_VAL_AD_SCALE_USEC,
CSR_LTR_LONG_VAL_AD_NO_SNOOP_SCALE) |
u32_encode_bits(250,
CSR_LTR_LONG_VAL_AD_NO_SNOOP_VAL) |
CSR_LTR_LONG_VAL_AD_SNOOP_REQ |
u32_encode_bits(CSR_LTR_LONG_VAL_AD_SCALE_USEC,
CSR_LTR_LONG_VAL_AD_SNOOP_SCALE) |
u32_encode_bits(250, CSR_LTR_LONG_VAL_AD_SNOOP_VAL);
iwl_write32(trans, CSR_LTR_LONG_VAL_AD, val);
}
if (trans->trans_cfg->device_family >= IWL_DEVICE_FAMILY_AX210)
iwl_write_umac_prph(trans, UREG_CPU_INIT_RUN, 1);
else