mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-24 01:30:55 +07:00
i3c: fix i2c and i3c scl rate by bus mode
Currently the I3C framework limits SCL frequency to FM speed when
dealing with a mixed slow bus, even if all I2C devices are FM+ capable.
The core was also not accounting for I3C speed limitations when
operating in mixed slow mode and was erroneously using FM+ speed as the
max I2C speed when operating in mixed fast mode.
Fixes: 3a379bbcea
("i3c: Add core I3C infrastructure")
Signed-off-by: Vitor Soares <vitor.soares@synopsys.com>
Cc: Boris Brezillon <bbrezillon@kernel.org>
Cc: <stable@vger.kernel.org>
Cc: <linux-kernel@vger.kernel.org>
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
This commit is contained in:
parent
5e343fbb71
commit
ecc8fb54bd
@ -91,6 +91,12 @@ void i3c_bus_normaluse_unlock(struct i3c_bus *bus)
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up_read(&bus->lock);
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}
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static struct i3c_master_controller *
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i3c_bus_to_i3c_master(struct i3c_bus *i3cbus)
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{
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return container_of(i3cbus, struct i3c_master_controller, bus);
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}
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static struct i3c_master_controller *dev_to_i3cmaster(struct device *dev)
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{
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return container_of(dev, struct i3c_master_controller, dev);
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@ -565,20 +571,38 @@ static const struct device_type i3c_masterdev_type = {
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.groups = i3c_masterdev_groups,
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};
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int i3c_bus_set_mode(struct i3c_bus *i3cbus, enum i3c_bus_mode mode)
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int i3c_bus_set_mode(struct i3c_bus *i3cbus, enum i3c_bus_mode mode,
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unsigned long max_i2c_scl_rate)
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{
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struct i3c_master_controller *master = i3c_bus_to_i3c_master(i3cbus);
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i3cbus->mode = mode;
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if (!i3cbus->scl_rate.i3c)
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i3cbus->scl_rate.i3c = I3C_BUS_TYP_I3C_SCL_RATE;
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if (!i3cbus->scl_rate.i2c) {
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if (i3cbus->mode == I3C_BUS_MODE_MIXED_SLOW)
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i3cbus->scl_rate.i2c = I3C_BUS_I2C_FM_SCL_RATE;
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else
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i3cbus->scl_rate.i2c = I3C_BUS_I2C_FM_PLUS_SCL_RATE;
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switch (i3cbus->mode) {
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case I3C_BUS_MODE_PURE:
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if (!i3cbus->scl_rate.i3c)
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i3cbus->scl_rate.i3c = I3C_BUS_TYP_I3C_SCL_RATE;
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break;
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case I3C_BUS_MODE_MIXED_FAST:
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if (!i3cbus->scl_rate.i3c)
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i3cbus->scl_rate.i3c = I3C_BUS_TYP_I3C_SCL_RATE;
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if (!i3cbus->scl_rate.i2c)
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i3cbus->scl_rate.i2c = max_i2c_scl_rate;
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break;
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case I3C_BUS_MODE_MIXED_SLOW:
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if (!i3cbus->scl_rate.i2c)
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i3cbus->scl_rate.i2c = max_i2c_scl_rate;
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if (!i3cbus->scl_rate.i3c ||
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i3cbus->scl_rate.i3c > i3cbus->scl_rate.i2c)
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i3cbus->scl_rate.i3c = i3cbus->scl_rate.i2c;
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break;
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default:
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return -EINVAL;
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}
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dev_dbg(&master->dev, "i2c-scl = %ld Hz i3c-scl = %ld Hz\n",
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i3cbus->scl_rate.i2c, i3cbus->scl_rate.i3c);
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/*
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* I3C/I2C frequency may have been overridden, check that user-provided
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* values are not exceeding max possible frequency.
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@ -1976,9 +2000,6 @@ of_i3c_master_add_i2c_boardinfo(struct i3c_master_controller *master,
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/* LVR is encoded in reg[2]. */
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boardinfo->lvr = reg[2];
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if (boardinfo->lvr & I3C_LVR_I2C_FM_MODE)
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master->bus.scl_rate.i2c = I3C_BUS_I2C_FM_SCL_RATE;
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list_add_tail(&boardinfo->node, &master->boardinfo.i2c);
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of_node_get(node);
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@ -2424,6 +2445,7 @@ int i3c_master_register(struct i3c_master_controller *master,
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const struct i3c_master_controller_ops *ops,
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bool secondary)
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{
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unsigned long i2c_scl_rate = I3C_BUS_I2C_FM_PLUS_SCL_RATE;
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struct i3c_bus *i3cbus = i3c_master_get_bus(master);
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enum i3c_bus_mode mode = I3C_BUS_MODE_PURE;
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struct i2c_dev_boardinfo *i2cbi;
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@ -2473,9 +2495,12 @@ int i3c_master_register(struct i3c_master_controller *master,
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ret = -EINVAL;
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goto err_put_dev;
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}
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if (i2cbi->lvr & I3C_LVR_I2C_FM_MODE)
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i2c_scl_rate = I3C_BUS_I2C_FM_SCL_RATE;
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}
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ret = i3c_bus_set_mode(i3cbus, mode);
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ret = i3c_bus_set_mode(i3cbus, mode, i2c_scl_rate);
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if (ret)
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goto err_put_dev;
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