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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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IIO: ADC: add stm32 DFSDM support for PDM microphone
This code offers a way to handle PDM audio microphones in ASOC framework. Audio driver should use consumer API. A specific management is implemented for DMA, with a callback, to allows to handle audio buffers efficiently. Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@st.com> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Arnaud Pouliquen
Mark Brown
parent
e2e6771c64
commit
eca949800d
16
Documentation/ABI/testing/sysfs-bus-iio-dfsdm-adc-stm32
Normal file
16
Documentation/ABI/testing/sysfs-bus-iio-dfsdm-adc-stm32
Normal file
@ -0,0 +1,16 @@
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What: /sys/bus/iio/devices/iio:deviceX/in_voltage_spi_clk_freq
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KernelVersion: 4.14
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Contact: arnaud.pouliquen@st.com
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Description:
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For audio purpose only.
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Used by audio driver to set/get the spi input frequency.
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This is mandatory if DFSDM is slave on SPI bus, to
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provide information on the SPI clock frequency during runtime
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Notice that the SPI frequency should be a multiple of sample
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frequency to ensure the precision.
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if DFSDM input is SPI master
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Reading SPI clkout frequency,
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error on writing
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If DFSDM input is SPI Slave:
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Reading returns value previously set.
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Writing value before starting conversions.
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@ -6,19 +6,23 @@
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* Author: Arnaud Pouliquen <arnaud.pouliquen@st.com>.
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*/
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#include <linux/dmaengine.h>
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#include <linux/dma-mapping.h>
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#include <linux/interrupt.h>
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#include <linux/iio/buffer.h>
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#include <linux/iio/hw-consumer.h>
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#include <linux/iio/iio.h>
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#include <linux/iio/sysfs.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/platform_device.h>
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#include <linux/regmap.h>
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#include <linux/slab.h>
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#include "stm32-dfsdm.h"
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#define DFSDM_DMA_BUFFER_SIZE (4 * PAGE_SIZE)
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/* Conversion timeout */
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#define DFSDM_TIMEOUT_US 100000
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#define DFSDM_TIMEOUT (msecs_to_jiffies(DFSDM_TIMEOUT_US / 1000))
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@ -58,6 +62,18 @@ struct stm32_dfsdm_adc {
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struct completion completion;
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u32 *buffer;
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/* Audio specific */
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unsigned int spi_freq; /* SPI bus clock frequency */
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unsigned int sample_freq; /* Sample frequency after filter decimation */
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int (*cb)(const void *data, size_t size, void *cb_priv);
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void *cb_priv;
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/* DMA */
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u8 *rx_buf;
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unsigned int bufi; /* Buffer current position */
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unsigned int buf_sz; /* Buffer size */
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struct dma_chan *dma_chan;
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dma_addr_t dma_buf;
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};
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struct stm32_dfsdm_str2field {
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@ -351,10 +367,63 @@ int stm32_dfsdm_channel_parse_of(struct stm32_dfsdm *dfsdm,
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return 0;
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}
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static ssize_t dfsdm_adc_audio_get_spiclk(struct iio_dev *indio_dev,
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uintptr_t priv,
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const struct iio_chan_spec *chan,
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char *buf)
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{
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struct stm32_dfsdm_adc *adc = iio_priv(indio_dev);
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return snprintf(buf, PAGE_SIZE, "%d\n", adc->spi_freq);
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}
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static ssize_t dfsdm_adc_audio_set_spiclk(struct iio_dev *indio_dev,
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uintptr_t priv,
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const struct iio_chan_spec *chan,
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const char *buf, size_t len)
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{
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struct stm32_dfsdm_adc *adc = iio_priv(indio_dev);
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struct stm32_dfsdm_filter *fl = &adc->dfsdm->fl_list[adc->fl_id];
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struct stm32_dfsdm_channel *ch = &adc->dfsdm->ch_list[adc->ch_id];
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unsigned int sample_freq = adc->sample_freq;
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unsigned int spi_freq;
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int ret;
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dev_err(&indio_dev->dev, "enter %s\n", __func__);
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/* If DFSDM is master on SPI, SPI freq can not be updated */
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if (ch->src != DFSDM_CHANNEL_SPI_CLOCK_EXTERNAL)
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return -EPERM;
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ret = kstrtoint(buf, 0, &spi_freq);
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if (ret)
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return ret;
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if (!spi_freq)
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return -EINVAL;
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if (sample_freq) {
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if (spi_freq % sample_freq)
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dev_warn(&indio_dev->dev,
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"Sampling rate not accurate (%d)\n",
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spi_freq / (spi_freq / sample_freq));
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ret = stm32_dfsdm_set_osrs(fl, 0, (spi_freq / sample_freq));
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if (ret < 0) {
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dev_err(&indio_dev->dev,
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"No filter parameters that match!\n");
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return ret;
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}
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}
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adc->spi_freq = spi_freq;
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return len;
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}
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static int stm32_dfsdm_start_conv(struct stm32_dfsdm_adc *adc, bool dma)
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{
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struct regmap *regmap = adc->dfsdm->regmap;
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int ret;
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unsigned int dma_en = 0, cont_en = 0;
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ret = stm32_dfsdm_start_channel(adc->dfsdm, adc->ch_id);
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if (ret < 0)
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@ -365,6 +434,24 @@ static int stm32_dfsdm_start_conv(struct stm32_dfsdm_adc *adc, bool dma)
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if (ret < 0)
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goto stop_channels;
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if (dma) {
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/* Enable DMA transfer*/
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dma_en = DFSDM_CR1_RDMAEN(1);
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/* Enable conversion triggered by SPI clock*/
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cont_en = DFSDM_CR1_RCONT(1);
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}
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/* Enable DMA transfer*/
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ret = regmap_update_bits(regmap, DFSDM_CR1(adc->fl_id),
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DFSDM_CR1_RDMAEN_MASK, dma_en);
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if (ret < 0)
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goto stop_channels;
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/* Enable conversion triggered by SPI clock*/
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ret = regmap_update_bits(regmap, DFSDM_CR1(adc->fl_id),
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DFSDM_CR1_RCONT_MASK, cont_en);
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if (ret < 0)
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goto stop_channels;
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ret = stm32_dfsdm_start_filter(adc->dfsdm, adc->fl_id);
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if (ret < 0)
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goto stop_channels;
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@ -398,6 +485,231 @@ static void stm32_dfsdm_stop_conv(struct stm32_dfsdm_adc *adc)
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stm32_dfsdm_stop_channel(adc->dfsdm, adc->ch_id);
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}
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static int stm32_dfsdm_set_watermark(struct iio_dev *indio_dev,
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unsigned int val)
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{
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struct stm32_dfsdm_adc *adc = iio_priv(indio_dev);
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unsigned int watermark = DFSDM_DMA_BUFFER_SIZE / 2;
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/*
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* DMA cyclic transfers are used, buffer is split into two periods.
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* There should be :
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* - always one buffer (period) DMA is working on
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* - one buffer (period) driver pushed to ASoC side.
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*/
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watermark = min(watermark, val * (unsigned int)(sizeof(u32)));
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adc->buf_sz = watermark * 2;
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return 0;
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}
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static unsigned int stm32_dfsdm_adc_dma_residue(struct stm32_dfsdm_adc *adc)
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{
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struct dma_tx_state state;
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enum dma_status status;
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status = dmaengine_tx_status(adc->dma_chan,
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adc->dma_chan->cookie,
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&state);
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if (status == DMA_IN_PROGRESS) {
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/* Residue is size in bytes from end of buffer */
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unsigned int i = adc->buf_sz - state.residue;
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unsigned int size;
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/* Return available bytes */
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if (i >= adc->bufi)
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size = i - adc->bufi;
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else
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size = adc->buf_sz + i - adc->bufi;
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return size;
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}
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return 0;
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}
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static void stm32_dfsdm_audio_dma_buffer_done(void *data)
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{
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struct iio_dev *indio_dev = data;
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struct stm32_dfsdm_adc *adc = iio_priv(indio_dev);
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int available = stm32_dfsdm_adc_dma_residue(adc);
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size_t old_pos;
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/*
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* FIXME: In Kernel interface does not support cyclic DMA buffer,and
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* offers only an interface to push data samples per samples.
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* For this reason IIO buffer interface is not used and interface is
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* bypassed using a private callback registered by ASoC.
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* This should be a temporary solution waiting a cyclic DMA engine
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* support in IIO.
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*/
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dev_dbg(&indio_dev->dev, "%s: pos = %d, available = %d\n", __func__,
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adc->bufi, available);
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old_pos = adc->bufi;
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while (available >= indio_dev->scan_bytes) {
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u32 *buffer = (u32 *)&adc->rx_buf[adc->bufi];
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/* Mask 8 LSB that contains the channel ID */
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*buffer = (*buffer & 0xFFFFFF00) << 8;
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available -= indio_dev->scan_bytes;
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adc->bufi += indio_dev->scan_bytes;
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if (adc->bufi >= adc->buf_sz) {
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if (adc->cb)
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adc->cb(&adc->rx_buf[old_pos],
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adc->buf_sz - old_pos, adc->cb_priv);
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adc->bufi = 0;
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old_pos = 0;
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}
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}
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if (adc->cb)
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adc->cb(&adc->rx_buf[old_pos], adc->bufi - old_pos,
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adc->cb_priv);
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}
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static int stm32_dfsdm_adc_dma_start(struct iio_dev *indio_dev)
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{
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struct stm32_dfsdm_adc *adc = iio_priv(indio_dev);
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struct dma_async_tx_descriptor *desc;
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dma_cookie_t cookie;
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int ret;
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if (!adc->dma_chan)
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return -EINVAL;
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dev_dbg(&indio_dev->dev, "%s size=%d watermark=%d\n", __func__,
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adc->buf_sz, adc->buf_sz / 2);
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/* Prepare a DMA cyclic transaction */
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desc = dmaengine_prep_dma_cyclic(adc->dma_chan,
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adc->dma_buf,
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adc->buf_sz, adc->buf_sz / 2,
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DMA_DEV_TO_MEM,
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DMA_PREP_INTERRUPT);
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if (!desc)
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return -EBUSY;
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desc->callback = stm32_dfsdm_audio_dma_buffer_done;
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desc->callback_param = indio_dev;
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cookie = dmaengine_submit(desc);
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ret = dma_submit_error(cookie);
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if (ret) {
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dmaengine_terminate_all(adc->dma_chan);
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return ret;
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}
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/* Issue pending DMA requests */
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dma_async_issue_pending(adc->dma_chan);
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return 0;
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}
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static int stm32_dfsdm_postenable(struct iio_dev *indio_dev)
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{
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struct stm32_dfsdm_adc *adc = iio_priv(indio_dev);
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int ret;
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/* Reset adc buffer index */
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adc->bufi = 0;
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ret = stm32_dfsdm_start_dfsdm(adc->dfsdm);
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if (ret < 0)
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return ret;
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ret = stm32_dfsdm_start_conv(adc, true);
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if (ret) {
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dev_err(&indio_dev->dev, "Can't start conversion\n");
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goto stop_dfsdm;
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}
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if (adc->dma_chan) {
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ret = stm32_dfsdm_adc_dma_start(indio_dev);
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if (ret) {
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dev_err(&indio_dev->dev, "Can't start DMA\n");
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goto err_stop_conv;
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}
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}
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return 0;
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err_stop_conv:
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stm32_dfsdm_stop_conv(adc);
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stop_dfsdm:
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stm32_dfsdm_stop_dfsdm(adc->dfsdm);
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return ret;
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}
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static int stm32_dfsdm_predisable(struct iio_dev *indio_dev)
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{
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struct stm32_dfsdm_adc *adc = iio_priv(indio_dev);
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if (adc->dma_chan)
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dmaengine_terminate_all(adc->dma_chan);
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stm32_dfsdm_stop_conv(adc);
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stm32_dfsdm_stop_dfsdm(adc->dfsdm);
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return 0;
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}
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static const struct iio_buffer_setup_ops stm32_dfsdm_buffer_setup_ops = {
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.postenable = &stm32_dfsdm_postenable,
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.predisable = &stm32_dfsdm_predisable,
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};
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/**
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* stm32_dfsdm_get_buff_cb() - register a callback that will be called when
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* DMA transfer period is achieved.
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*
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* @iio_dev: Handle to IIO device.
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* @cb: Pointer to callback function:
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* - data: pointer to data buffer
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* - size: size in byte of the data buffer
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* - private: pointer to consumer private structure.
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* @private: Pointer to consumer private structure.
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*/
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int stm32_dfsdm_get_buff_cb(struct iio_dev *iio_dev,
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int (*cb)(const void *data, size_t size,
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void *private),
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void *private)
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{
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struct stm32_dfsdm_adc *adc;
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if (!iio_dev)
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return -EINVAL;
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adc = iio_priv(iio_dev);
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adc->cb = cb;
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adc->cb_priv = private;
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return 0;
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}
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EXPORT_SYMBOL_GPL(stm32_dfsdm_get_buff_cb);
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/**
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* stm32_dfsdm_release_buff_cb - unregister buffer callback
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*
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* @iio_dev: Handle to IIO device.
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*/
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int stm32_dfsdm_release_buff_cb(struct iio_dev *iio_dev)
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{
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struct stm32_dfsdm_adc *adc;
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if (!iio_dev)
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return -EINVAL;
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adc = iio_priv(iio_dev);
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adc->cb = NULL;
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adc->cb_priv = NULL;
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return 0;
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}
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EXPORT_SYMBOL_GPL(stm32_dfsdm_release_buff_cb);
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static int stm32_dfsdm_single_conv(struct iio_dev *indio_dev,
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const struct iio_chan_spec *chan, int *res)
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{
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@ -453,15 +765,41 @@ static int stm32_dfsdm_write_raw(struct iio_dev *indio_dev,
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{
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struct stm32_dfsdm_adc *adc = iio_priv(indio_dev);
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struct stm32_dfsdm_filter *fl = &adc->dfsdm->fl_list[adc->fl_id];
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struct stm32_dfsdm_channel *ch = &adc->dfsdm->ch_list[adc->ch_id];
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unsigned int spi_freq = adc->spi_freq;
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int ret = -EINVAL;
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if (mask == IIO_CHAN_INFO_OVERSAMPLING_RATIO) {
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switch (mask) {
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case IIO_CHAN_INFO_OVERSAMPLING_RATIO:
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ret = stm32_dfsdm_set_osrs(fl, 0, val);
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if (!ret)
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adc->oversamp = val;
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return ret;
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case IIO_CHAN_INFO_SAMP_FREQ:
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if (!val)
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return -EINVAL;
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if (ch->src != DFSDM_CHANNEL_SPI_CLOCK_EXTERNAL)
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spi_freq = adc->dfsdm->spi_master_freq;
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if (spi_freq % val)
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dev_warn(&indio_dev->dev,
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"Sampling rate not accurate (%d)\n",
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spi_freq / (spi_freq / val));
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ret = stm32_dfsdm_set_osrs(fl, 0, (spi_freq / val));
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if (ret < 0) {
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dev_err(&indio_dev->dev,
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"Not able to find parameter that match!\n");
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return ret;
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}
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adc->sample_freq = val;
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return 0;
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}
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|
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return ret;
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return -EINVAL;
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}
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static int stm32_dfsdm_read_raw(struct iio_dev *indio_dev,
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@ -493,12 +831,23 @@ static int stm32_dfsdm_read_raw(struct iio_dev *indio_dev,
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case IIO_CHAN_INFO_OVERSAMPLING_RATIO:
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*val = adc->oversamp;
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return IIO_VAL_INT;
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case IIO_CHAN_INFO_SAMP_FREQ:
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*val = adc->sample_freq;
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return IIO_VAL_INT;
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}
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|
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return -EINVAL;
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}
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|
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static const struct iio_info stm32_dfsdm_info_audio = {
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.hwfifo_set_watermark = stm32_dfsdm_set_watermark,
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.read_raw = stm32_dfsdm_read_raw,
|
||||
.write_raw = stm32_dfsdm_write_raw,
|
||||
};
|
||||
|
||||
static const struct iio_info stm32_dfsdm_info_adc = {
|
||||
.read_raw = stm32_dfsdm_read_raw,
|
||||
.write_raw = stm32_dfsdm_write_raw,
|
||||
@ -531,6 +880,70 @@ static irqreturn_t stm32_dfsdm_irq(int irq, void *arg)
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
|
||||
/*
|
||||
* Define external info for SPI Frequency and audio sampling rate that can be
|
||||
* configured by ASoC driver through consumer.h API
|
||||
*/
|
||||
static const struct iio_chan_spec_ext_info dfsdm_adc_audio_ext_info[] = {
|
||||
/* spi_clk_freq : clock freq on SPI/manchester bus used by channel */
|
||||
{
|
||||
.name = "spi_clk_freq",
|
||||
.shared = IIO_SHARED_BY_TYPE,
|
||||
.read = dfsdm_adc_audio_get_spiclk,
|
||||
.write = dfsdm_adc_audio_set_spiclk,
|
||||
},
|
||||
{},
|
||||
};
|
||||
|
||||
static void stm32_dfsdm_dma_release(struct iio_dev *indio_dev)
|
||||
{
|
||||
struct stm32_dfsdm_adc *adc = iio_priv(indio_dev);
|
||||
|
||||
if (adc->dma_chan) {
|
||||
dma_free_coherent(adc->dma_chan->device->dev,
|
||||
DFSDM_DMA_BUFFER_SIZE,
|
||||
adc->rx_buf, adc->dma_buf);
|
||||
dma_release_channel(adc->dma_chan);
|
||||
}
|
||||
}
|
||||
|
||||
static int stm32_dfsdm_dma_request(struct iio_dev *indio_dev)
|
||||
{
|
||||
struct stm32_dfsdm_adc *adc = iio_priv(indio_dev);
|
||||
struct dma_slave_config config = {
|
||||
.src_addr = (dma_addr_t)adc->dfsdm->phys_base +
|
||||
DFSDM_RDATAR(adc->fl_id),
|
||||
.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES,
|
||||
};
|
||||
int ret;
|
||||
|
||||
adc->dma_chan = dma_request_slave_channel(&indio_dev->dev, "rx");
|
||||
if (!adc->dma_chan)
|
||||
return -EINVAL;
|
||||
|
||||
adc->rx_buf = dma_alloc_coherent(adc->dma_chan->device->dev,
|
||||
DFSDM_DMA_BUFFER_SIZE,
|
||||
&adc->dma_buf, GFP_KERNEL);
|
||||
if (!adc->rx_buf) {
|
||||
ret = -ENOMEM;
|
||||
goto err_release;
|
||||
}
|
||||
|
||||
ret = dmaengine_slave_config(adc->dma_chan, &config);
|
||||
if (ret)
|
||||
goto err_free;
|
||||
|
||||
return 0;
|
||||
|
||||
err_free:
|
||||
dma_free_coherent(adc->dma_chan->device->dev, DFSDM_DMA_BUFFER_SIZE,
|
||||
adc->rx_buf, adc->dma_buf);
|
||||
err_release:
|
||||
dma_release_channel(adc->dma_chan);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int stm32_dfsdm_adc_chan_init_one(struct iio_dev *indio_dev,
|
||||
struct iio_chan_spec *ch)
|
||||
{
|
||||
@ -551,7 +964,12 @@ static int stm32_dfsdm_adc_chan_init_one(struct iio_dev *indio_dev,
|
||||
ch->info_mask_separate = BIT(IIO_CHAN_INFO_RAW);
|
||||
ch->info_mask_shared_by_all = BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO);
|
||||
|
||||
ch->scan_type.sign = 'u';
|
||||
if (adc->dev_data->type == DFSDM_AUDIO) {
|
||||
ch->scan_type.sign = 's';
|
||||
ch->ext_info = dfsdm_adc_audio_ext_info;
|
||||
} else {
|
||||
ch->scan_type.sign = 'u';
|
||||
}
|
||||
ch->scan_type.realbits = 24;
|
||||
ch->scan_type.storagebits = 32;
|
||||
adc->ch_id = ch->channel;
|
||||
@ -560,6 +978,39 @@ static int stm32_dfsdm_adc_chan_init_one(struct iio_dev *indio_dev,
|
||||
&adc->dfsdm->ch_list[ch->channel]);
|
||||
}
|
||||
|
||||
static int stm32_dfsdm_audio_init(struct iio_dev *indio_dev)
|
||||
{
|
||||
struct iio_chan_spec *ch;
|
||||
struct stm32_dfsdm_adc *adc = iio_priv(indio_dev);
|
||||
struct stm32_dfsdm_channel *d_ch;
|
||||
int ret;
|
||||
|
||||
indio_dev->modes |= INDIO_BUFFER_SOFTWARE;
|
||||
indio_dev->setup_ops = &stm32_dfsdm_buffer_setup_ops;
|
||||
|
||||
ch = devm_kzalloc(&indio_dev->dev, sizeof(*ch), GFP_KERNEL);
|
||||
if (!ch)
|
||||
return -ENOMEM;
|
||||
|
||||
ch->scan_index = 0;
|
||||
|
||||
ret = stm32_dfsdm_adc_chan_init_one(indio_dev, ch);
|
||||
if (ret < 0) {
|
||||
dev_err(&indio_dev->dev, "Channels init failed\n");
|
||||
return ret;
|
||||
}
|
||||
ch->info_mask_separate = BIT(IIO_CHAN_INFO_SAMP_FREQ);
|
||||
|
||||
d_ch = &adc->dfsdm->ch_list[adc->ch_id];
|
||||
if (d_ch->src != DFSDM_CHANNEL_SPI_CLOCK_EXTERNAL)
|
||||
adc->spi_freq = adc->dfsdm->spi_master_freq;
|
||||
|
||||
indio_dev->num_channels = 1;
|
||||
indio_dev->channels = ch;
|
||||
|
||||
return stm32_dfsdm_dma_request(indio_dev);
|
||||
}
|
||||
|
||||
static int stm32_dfsdm_adc_init(struct iio_dev *indio_dev)
|
||||
{
|
||||
struct iio_chan_spec *ch;
|
||||
@ -612,11 +1063,20 @@ static const struct stm32_dfsdm_dev_data stm32h7_dfsdm_adc_data = {
|
||||
.init = stm32_dfsdm_adc_init,
|
||||
};
|
||||
|
||||
static const struct stm32_dfsdm_dev_data stm32h7_dfsdm_audio_data = {
|
||||
.type = DFSDM_AUDIO,
|
||||
.init = stm32_dfsdm_audio_init,
|
||||
};
|
||||
|
||||
static const struct of_device_id stm32_dfsdm_adc_match[] = {
|
||||
{
|
||||
.compatible = "st,stm32-dfsdm-adc",
|
||||
.data = &stm32h7_dfsdm_adc_data,
|
||||
},
|
||||
{
|
||||
.compatible = "st,stm32-dfsdm-dmic",
|
||||
.data = &stm32h7_dfsdm_audio_data,
|
||||
},
|
||||
{}
|
||||
};
|
||||
|
||||
@ -667,8 +1127,13 @@ static int stm32_dfsdm_adc_probe(struct platform_device *pdev)
|
||||
name = devm_kzalloc(dev, sizeof("dfsdm-adc0"), GFP_KERNEL);
|
||||
if (!name)
|
||||
return -ENOMEM;
|
||||
iio->info = &stm32_dfsdm_info_adc;
|
||||
snprintf(name, sizeof("dfsdm-adc0"), "dfsdm-adc%d", adc->fl_id);
|
||||
if (dev_data->type == DFSDM_AUDIO) {
|
||||
iio->info = &stm32_dfsdm_info_audio;
|
||||
snprintf(name, sizeof("dfsdm-pdm0"), "dfsdm-pdm%d", adc->fl_id);
|
||||
} else {
|
||||
iio->info = &stm32_dfsdm_info_adc;
|
||||
snprintf(name, sizeof("dfsdm-adc0"), "dfsdm-adc%d", adc->fl_id);
|
||||
}
|
||||
iio->name = name;
|
||||
|
||||
/*
|
||||
@ -700,7 +1165,27 @@ static int stm32_dfsdm_adc_probe(struct platform_device *pdev)
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
return iio_device_register(iio);
|
||||
ret = iio_device_register(iio);
|
||||
if (ret < 0)
|
||||
goto err_cleanup;
|
||||
|
||||
dev_err(dev, "of_platform_populate\n");
|
||||
if (dev_data->type == DFSDM_AUDIO) {
|
||||
ret = of_platform_populate(np, NULL, NULL, dev);
|
||||
if (ret < 0) {
|
||||
dev_err(dev, "Failed to find an audio DAI\n");
|
||||
goto err_unregister;
|
||||
}
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
||||
err_unregister:
|
||||
iio_device_unregister(iio);
|
||||
err_cleanup:
|
||||
stm32_dfsdm_dma_release(iio);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int stm32_dfsdm_adc_remove(struct platform_device *pdev)
|
||||
@ -708,7 +1193,10 @@ static int stm32_dfsdm_adc_remove(struct platform_device *pdev)
|
||||
struct stm32_dfsdm_adc *adc = platform_get_drvdata(pdev);
|
||||
struct iio_dev *indio_dev = iio_priv_to_dev(adc);
|
||||
|
||||
if (adc->dev_data->type == DFSDM_AUDIO)
|
||||
of_platform_depopulate(&pdev->dev);
|
||||
iio_device_unregister(indio_dev);
|
||||
stm32_dfsdm_dma_release(indio_dev);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
18
include/linux/iio/adc/stm32-dfsdm-adc.h
Normal file
18
include/linux/iio/adc/stm32-dfsdm-adc.h
Normal file
@ -0,0 +1,18 @@
|
||||
/* SPDX-License-Identifier: GPL-2.0 */
|
||||
/*
|
||||
* This file discribe the STM32 DFSDM IIO driver API for audio part
|
||||
*
|
||||
* Copyright (C) 2017, STMicroelectronics - All Rights Reserved
|
||||
* Author(s): Arnaud Pouliquen <arnaud.pouliquen@st.com>.
|
||||
*/
|
||||
|
||||
#ifndef STM32_DFSDM_ADC_H
|
||||
#define STM32_DFSDM_ADC_H
|
||||
|
||||
int stm32_dfsdm_get_buff_cb(struct iio_dev *iio_dev,
|
||||
int (*cb)(const void *data, size_t size,
|
||||
void *private),
|
||||
void *private);
|
||||
int stm32_dfsdm_release_buff_cb(struct iio_dev *iio_dev);
|
||||
|
||||
#endif
|
||||
Loading…
Reference in New Issue
Block a user