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drm/amdgpu/powerplay: check vrefresh when when changing displays

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Compare the current vrefresh in addition to the number of displays
when determining whether or not the smu needs updates when changing
modes. The SMU needs to be updated if the vbi timeout changes due
to a different refresh rate.  Fixes flickering around mode changes
in some cases on polaris parts.

Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Alex Deucher 2018-08-09 14:24:08 -05:00
parent 7ea34ea3e8
commit ec2e082a79
8 changed files with 11 additions and 1 deletions
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3
drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
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@ -4132,6 +4132,9 @@ smu7_check_smc_update_required_for_display_configuration(struct pp_hwmgr *hwmgr)
if (data->display_timing.num_existing_displays != hwmgr->display_config->num_display)
is_update_required = true;
if (data->display_timing.vrefresh != hwmgr->display_config->vrefresh)
is_update_required = true;
if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_SclkDeepSleep)) {
if (data->display_timing.min_clock_in_sr != hwmgr->display_config->min_core_set_clock_in_sr &&
(data->display_timing.min_clock_in_sr >= SMU7_MINIMUM_ENGINE_CLOCK ||

1
drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.h
View File

@ -156,6 +156,7 @@ struct smu7_vbios_boot_state {
struct smu7_display_timing {
uint32_t min_clock_in_sr;
uint32_t num_existing_displays;
uint32_t vrefresh;
};
struct smu7_dpmlevel_enable_mask {

1
drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c
View File

@ -1231,6 +1231,7 @@ static int ci_populate_single_memory_level(
memory_level->DisplayWatermark = PPSMC_DISPLAY_WATERMARK_LOW;
data->display_timing.num_existing_displays = hwmgr->display_config->num_display;
data->display_timing.vrefresh = hwmgr->display_config->vrefresh;
/* stutter mode not support on ci */

3
drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c
View File

@ -1210,7 +1210,8 @@ static int fiji_populate_single_memory_level(struct pp_hwmgr *hwmgr,
* PECI_GetNumberOfActiveDisplays(hwmgr->pPECI,
* &(data->DisplayTiming.numExistingDisplays));
*/
data->display_timing.num_existing_displays = 1;
data->display_timing.num_existing_displays = hwmgr->display_config->num_display;
data->display_timing.vrefresh = hwmgr->display_config->vrefresh;
if (mclk_stutter_mode_threshold &&
(clock <= mclk_stutter_mode_threshold) &&

1
drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c
View File

@ -1280,6 +1280,7 @@ static int iceland_populate_single_memory_level(
memory_level->DisplayWatermark = PPSMC_DISPLAY_WATERMARK_LOW;
data->display_timing.num_existing_displays = hwmgr->display_config->num_display;
data->display_timing.vrefresh = hwmgr->display_config->vrefresh;
/* stutter mode not support on iceland */

1
drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c
View File

@ -1103,6 +1103,7 @@ static int polaris10_populate_single_memory_level(struct pp_hwmgr *hwmgr,
mem_level->DisplayWatermark = PPSMC_DISPLAY_WATERMARK_LOW;
data->display_timing.num_existing_displays = hwmgr->display_config->num_display;
data->display_timing.vrefresh = hwmgr->display_config->vrefresh;
if (mclk_stutter_mode_threshold &&
(clock <= mclk_stutter_mode_threshold) &&

1
drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c
View File

@ -1004,6 +1004,7 @@ static int tonga_populate_single_memory_level(
memory_level->DisplayWatermark = PPSMC_DISPLAY_WATERMARK_LOW;
data->display_timing.num_existing_displays = hwmgr->display_config->num_display;
data->display_timing.vrefresh = hwmgr->display_config->vrefresh;
if ((mclk_stutter_mode_threshold != 0) &&
(memory_clock <= mclk_stutter_mode_threshold) &&

1
drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c
View File

@ -1009,6 +1009,7 @@ static int vegam_populate_single_memory_level(struct pp_hwmgr *hwmgr,
mem_level->DisplayWatermark = PPSMC_DISPLAY_WATERMARK_LOW;
data->display_timing.num_existing_displays = hwmgr->display_config->num_display;
data->display_timing.vrefresh = hwmgr->display_config->vrefresh;
if (mclk_stutter_mode_threshold &&
(clock <= mclk_stutter_mode_threshold) &&