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arm64: dts: ls1043a: Add cache nodes for cacheinfo support

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Adds the cache nodes and next-level-cache property for the
cacheinfo to work.

Signed-off-by: Li Yang <leoyang.li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This commit is contained in:
Li Yang 2016-06-16 18:35:03 -05:00 committed by Shawn Guo
parent f8ed1d9b0f
commit ec049f3348
1 changed files with 8 additions and 0 deletions
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8
arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
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@ -65,6 +65,7 @@ cpu0: cpu@0 {
compatible = "arm,cortex-a53";
reg = <0x0>;
clocks = <&clockgen 1 0>;
next-level-cache = <&l2>;
};
cpu1: cpu@1 {
@ -72,6 +73,7 @@ cpu1: cpu@1 {
compatible = "arm,cortex-a53";
reg = <0x1>;
clocks = <&clockgen 1 0>;
next-level-cache = <&l2>;
};
cpu2: cpu@2 {
@ -79,6 +81,7 @@ cpu2: cpu@2 {
compatible = "arm,cortex-a53";
reg = <0x2>;
clocks = <&clockgen 1 0>;
next-level-cache = <&l2>;
};
cpu3: cpu@3 {
@ -86,6 +89,11 @@ cpu3: cpu@3 {
compatible = "arm,cortex-a53";
reg = <0x3>;
clocks = <&clockgen 1 0>;
next-level-cache = <&l2>;
};
l2: l2-cache {
compatible = "cache";
};
};