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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2025-01-21 13:13:07 +07:00
Merge branch 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc
Quoth BenH: "Here are a few powerpc fixes for 3.3, all pretty trivial. I also added the patch to define GET_IP/SET_IP so we can use some more asm-generic goodness." * 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc: powerpc/pseries/eeh: Fix crash when error happens during device probe powerpc/pseries: Fix partition migration hang in stop_topology_update powerpc/powernv: Disable interrupts while taking phb->lock powerpc: Fix WARN_ON in decrementer_check_overflow powerpc/wsp: Fix IRQ affinity setting powerpc: Implement GET_IP/SET_IP powerpc/wsp: Permanently enable PCI class code workaround
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commit
ebf4bcbd5f
@ -142,6 +142,11 @@ static inline const char *eeh_pci_name(struct pci_dev *pdev)
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return pdev ? pci_name(pdev) : "<null>";
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}
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static inline const char *eeh_driver_name(struct pci_dev *pdev)
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{
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return (pdev && pdev->driver) ? pdev->driver->name : "<null>";
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}
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#endif /* CONFIG_EEH */
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#else /* CONFIG_PCI */
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@ -83,8 +83,18 @@ struct pt_regs {
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#ifndef __ASSEMBLY__
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#define instruction_pointer(regs) ((regs)->nip)
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#define user_stack_pointer(regs) ((regs)->gpr[1])
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#define GET_IP(regs) ((regs)->nip)
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#define GET_USP(regs) ((regs)->gpr[1])
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#define GET_FP(regs) (0)
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#define SET_FP(regs, val)
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#ifdef CONFIG_SMP
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extern unsigned long profile_pc(struct pt_regs *regs);
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#define profile_pc profile_pc
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#endif
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#include <asm-generic/ptrace.h>
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#define kernel_stack_pointer(regs) ((regs)->gpr[1])
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static inline int is_syscall_success(struct pt_regs *regs)
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{
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@ -99,12 +109,6 @@ static inline long regs_return_value(struct pt_regs *regs)
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return -regs->gpr[3];
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}
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#ifdef CONFIG_SMP
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extern unsigned long profile_pc(struct pt_regs *regs);
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#else
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#define profile_pc(regs) instruction_pointer(regs)
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#endif
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#ifdef __powerpc64__
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#define user_mode(regs) ((((regs)->msr) >> MSR_PR_LG) & 0x1)
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#else
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@ -118,10 +118,14 @@ static inline notrace void set_soft_enabled(unsigned long enable)
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static inline notrace void decrementer_check_overflow(void)
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{
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u64 now = get_tb_or_rtc();
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u64 *next_tb = &__get_cpu_var(decrementers_next_tb);
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u64 *next_tb;
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preempt_disable();
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next_tb = &__get_cpu_var(decrementers_next_tb);
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if (now >= *next_tb)
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set_dec(1);
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preempt_enable();
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}
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notrace void arch_local_irq_restore(unsigned long en)
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@ -716,7 +716,6 @@ static int __rtas_suspend_last_cpu(struct rtas_suspend_me_data *data, int wake_w
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int cpu;
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slb_set_size(SLB_MIN_SIZE);
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stop_topology_update();
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printk(KERN_DEBUG "calling ibm,suspend-me on cpu %i\n", smp_processor_id());
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while (rc == H_MULTI_THREADS_ACTIVE && !atomic_read(&data->done) &&
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@ -732,7 +731,6 @@ static int __rtas_suspend_last_cpu(struct rtas_suspend_me_data *data, int wake_w
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rc = atomic_read(&data->error);
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atomic_set(&data->error, rc);
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start_topology_update();
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pSeries_coalesce_init();
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if (wake_when_done) {
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@ -846,6 +844,7 @@ int rtas_ibm_suspend_me(struct rtas_args *args)
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atomic_set(&data.error, 0);
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data.token = rtas_token("ibm,suspend-me");
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data.complete = &done;
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stop_topology_update();
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/* Call function on all CPUs. One of us will make the
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* rtas call
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@ -858,6 +857,8 @@ int rtas_ibm_suspend_me(struct rtas_args *args)
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if (atomic_read(&data.error) != 0)
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printk(KERN_ERR "Error doing global join\n");
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start_topology_update();
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return atomic_read(&data.error);
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}
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#else /* CONFIG_PPC_PSERIES */
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@ -52,32 +52,38 @@ static int pnv_msi_check_device(struct pci_dev* pdev, int nvec, int type)
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static unsigned int pnv_get_one_msi(struct pnv_phb *phb)
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{
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unsigned int id;
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unsigned long flags;
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unsigned int id, rc;
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spin_lock_irqsave(&phb->lock, flags);
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spin_lock(&phb->lock);
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id = find_next_zero_bit(phb->msi_map, phb->msi_count, phb->msi_next);
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if (id >= phb->msi_count && phb->msi_next)
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id = find_next_zero_bit(phb->msi_map, phb->msi_count, 0);
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if (id >= phb->msi_count) {
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spin_unlock(&phb->lock);
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return 0;
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rc = 0;
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goto out;
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}
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__set_bit(id, phb->msi_map);
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spin_unlock(&phb->lock);
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return id + phb->msi_base;
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rc = id + phb->msi_base;
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out:
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spin_unlock_irqrestore(&phb->lock, flags);
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return rc;
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}
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static void pnv_put_msi(struct pnv_phb *phb, unsigned int hwirq)
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{
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unsigned long flags;
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unsigned int id;
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if (WARN_ON(hwirq < phb->msi_base ||
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hwirq >= (phb->msi_base + phb->msi_count)))
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return;
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id = hwirq - phb->msi_base;
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spin_lock(&phb->lock);
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spin_lock_irqsave(&phb->lock, flags);
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__clear_bit(id, phb->msi_map);
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spin_unlock(&phb->lock);
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spin_unlock_irqrestore(&phb->lock, flags);
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}
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static int pnv_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)
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@ -551,9 +551,9 @@ int eeh_dn_check_failure(struct device_node *dn, struct pci_dev *dev)
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printk (KERN_ERR "EEH: %d reads ignored for recovering device at "
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"location=%s driver=%s pci addr=%s\n",
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pdn->eeh_check_count, location,
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dev->driver->name, eeh_pci_name(dev));
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eeh_driver_name(dev), eeh_pci_name(dev));
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printk (KERN_ERR "EEH: Might be infinite loop in %s driver\n",
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dev->driver->name);
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eeh_driver_name(dev));
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dump_stack();
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}
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goto dn_unlock;
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@ -24,6 +24,7 @@
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#include <asm/machdep.h>
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#include <asm/mmu.h>
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#include <asm/rtas.h>
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#include <asm/topology.h>
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static u64 stream_id;
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static struct device suspend_dev;
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@ -138,8 +139,11 @@ static ssize_t store_hibernate(struct device *dev,
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ssleep(1);
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} while (rc == -EAGAIN);
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if (!rc)
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if (!rc) {
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stop_topology_update();
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rc = pm_suspend(PM_SUSPEND_MEM);
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start_topology_update();
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}
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stream_id = 0;
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@ -346,7 +346,7 @@ static int wsp_chip_set_affinity(struct irq_data *d,
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* For the moment only implement delivery to all cpus or one cpu.
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* Get current irq_server for the given irq
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*/
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ret = cache_hwirq_map(ics, d->irq, cpumask);
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ret = cache_hwirq_map(ics, hw_irq, cpumask);
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if (ret == -1) {
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char cpulist[128];
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cpumask_scnprintf(cpulist, sizeof(cpulist), cpumask);
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@ -468,15 +468,15 @@ static void __init wsp_pcie_configure_hw(struct pci_controller *hose)
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#define DUMP_REG(x) \
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pr_debug("%-30s : 0x%016llx\n", #x, in_be64(hose->cfg_data + x))
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#ifdef CONFIG_WSP_DD1_WORKAROUND_BAD_PCIE_CLASS
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/* WSP DD1 has a bogus class code by default in the PCI-E
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* root complex's built-in P2P bridge */
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/*
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* Some WSP variants has a bogus class code by default in the PCI-E
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* root complex's built-in P2P bridge
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*/
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val = in_be64(hose->cfg_data + PCIE_REG_SYS_CFG1);
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pr_debug("PCI-E SYS_CFG1 : 0x%llx\n", val);
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out_be64(hose->cfg_data + PCIE_REG_SYS_CFG1,
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(val & ~PCIE_REG_SYS_CFG1_CLASS_CODE) | (PCI_CLASS_BRIDGE_PCI << 8));
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pr_debug("PCI-E SYS_CFG1 : 0x%llx\n", in_be64(hose->cfg_data + PCIE_REG_SYS_CFG1));
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#endif /* CONFIG_WSP_DD1_WORKAROUND_BAD_PCIE_CLASS */
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#ifdef CONFIG_WSP_DD1_WORKAROUND_DD1_TCE_BUGS
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/* XXX Disable TCE caching, it doesn't work on DD1 */
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