AuxXxilium/linux_dsm_epyc7002
1
0
Fork 0
mirror of https://github.com/AuxXxilium/linux_dsm_epyc7002.git synced 2024-12-07 14:56:44 +07:00
Code Issues Actions Packages Projects Releases Wiki Activity

clk: sunxi: Add a common setup function for mmc module clocks

Browse Source 
The only difference between module clocks on different platforms is the
width of the mux register bits and the valid values, which are passed in
through struct factors_data. The phase clocks parts are identical.

This patch generalizes the setup function, so most of the code can be
reused when adding sun9i support, which has a wider mux register.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
This commit is contained in:
Chen-Yu Tsai 2015-01-13 09:37:23 +08:00 committed by Maxime Ripard
parent a7d19057e7
commit eb378df79e
1 changed files with 19 additions and 7 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

26
drivers/clk/sunxi/clk-mod0.c
View File

@ -272,9 +272,16 @@ static const struct clk_ops mmc_clk_ops = {
.set_phase = mmc_set_phase,
};
static DEFINE_SPINLOCK(sun4i_a10_mmc_lock);
static void __init sun4i_a10_mmc_setup(struct device_node *node)
/*
* sunxi_mmc_setup - Common setup function for mmc module clocks
*
* The only difference between module clocks on different platforms is the
* width of the mux register bits and the valid values, which are passed in
* through struct factors_data. The phase clocks parts are identical.
*/
static void __init sunxi_mmc_setup(struct device_node *node,
const struct factors_data *data,
spinlock_t *lock)
{
struct clk_onecell_data *clk_data;
const char *parent;
@ -296,9 +303,7 @@ static void __init sun4i_a10_mmc_setup(struct device_node *node)
goto err_free_data;
clk_data->clk_num = 3;
clk_data->clks[0] = sunxi_factors_register(node,
&sun4i_a10_mod0_data,
&sun4i_a10_mmc_lock, reg);
clk_data->clks[0] = sunxi_factors_register(node, data, lock, reg);
if (!clk_data->clks[0])
goto err_free_clks;
@ -318,7 +323,7 @@ static void __init sun4i_a10_mmc_setup(struct device_node *node)
phase->hw.init = &init;
phase->reg = reg;
phase->lock = &sun4i_a10_mmc_lock;
phase->lock = lock;
if (i == 1)
phase->offset = 8;
@ -345,4 +350,11 @@ static void __init sun4i_a10_mmc_setup(struct device_node *node)
err_free_data:
kfree(clk_data);
}
static DEFINE_SPINLOCK(sun4i_a10_mmc_lock);
static void __init sun4i_a10_mmc_setup(struct device_node *node)
{
sunxi_mmc_setup(node, &sun4i_a10_mod0_data, &sun4i_a10_mmc_lock);
}
CLK_OF_DECLARE(sun4i_a10_mmc, "allwinner,sun4i-a10-mmc-clk", sun4i_a10_mmc_setup);