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ath5k: More EEPROM code updates

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* Don't scale power values on RF5111 EEPROMs because they get out of
  bounds (power is u8, so multiplying power by 50 is too much and there
  is no reason to do so -we don't do it on other chips anyway-). HAL
  does it as a technique to handle 0.5 dbm steps but i believe it's not
  the right thing to do and certainly not the right place to do it. We
  'll work this out on interpolation code for all chips (0.5 or 0.25
  steps etc) in a generic way.

Signed-Off-by: Nick Kossifidis <mickflemm@gmail.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:
Nick Kossifidis 2008-12-22 12:35:55 +02:00 committed by John W. Linville
parent b306b82c58
commit eaee7cc2c1
1 changed files with 1 additions and 6 deletions
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7
drivers/net/wireless/ath5k/eeprom.c
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@ -665,7 +665,7 @@ ath5k_eeprom_read_pcal_info_5111(struct ath5k_hw *ah, int mode)
struct ath5k_eeprom_info *ee = &ah->ah_capabilities.cap_eeprom;
struct ath5k_chan_pcal_info *pcal;
int offset, ret;
int i, j;
int i;
u16 val;
offset = AR5K_EEPROM_GROUPS_START(ee->ee_version);
@ -745,11 +745,6 @@ ath5k_eeprom_read_pcal_info_5111(struct ath5k_hw *ah, int mode)
ath5k_get_pcdac_intercepts(ah, cdata->pcdac_min,
cdata->pcdac_max, cdata->pcdac);
for (j = 0; j < AR5K_EEPROM_N_PCDAC; j++) {
cdata->pwr[j] = (u16)
(AR5K_EEPROM_POWER_STEP * cdata->pwr[j]);
}
}
return 0;