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ASoC: fsl-esai: big-endian support

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For most platforms, the CPU and ESAI device is in the same endianess
mode. While for the LS1 platform, the CPU is in LE mode and the ESAI
is in BE mode.

Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com>
Acked-by: Nicolin Chen <Guangyu.Chen@freescale.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
This commit is contained in:
Xiubo Li 2014-02-11 15:42:49 +08:00 committed by Mark Brown
parent 33529ec94f
commit eaba603fc7
2 changed files with 9 additions and 1 deletions
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5
Documentation/devicetree/bindings/sound/fsl,esai.txt
View File

@ -34,6 +34,10 @@ Required properties:
that ESAI would work in the synchronous mode, which means all the settings
for Receiving would be duplicated from Transmition related registers.
- big-endian : If this property is absent, the native endian mode will
be in use as default, or the big endian mode will be in use for all the
device registers.
Example:
esai: esai@02024000 {
@ -46,5 +50,6 @@ esai: esai@02024000 {
dma-names = "rx", "tx";
fsl,fifo-depth = <128>;
fsl,esai-synchronous;
big-endian;
status = "disabled";
};

5
sound/soc/fsl/fsl_esai.c
View File

@ -678,7 +678,7 @@ static bool fsl_esai_writeable_reg(struct device *dev, unsigned int reg)
}
}
static const struct regmap_config fsl_esai_regmap_config = {
static struct regmap_config fsl_esai_regmap_config = {
.reg_bits = 32,
.reg_stride = 4,
.val_bits = 32,
@ -704,6 +704,9 @@ static int fsl_esai_probe(struct platform_device *pdev)
esai_priv->pdev = pdev;
strcpy(esai_priv->name, np->name);
if (of_property_read_bool(np, "big-endian"))
fsl_esai_regmap_config.val_format_endian = REGMAP_ENDIAN_BIG;
/* Get the addresses and IRQ */
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
regs = devm_ioremap_resource(&pdev->dev, res);