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USB: EHCI: clear PHCD before resuming
This is a bug fix for PHCD (phy clock disable) low power feature: After PHCD is set, any write to PORTSC register is illegal, so when resume ports, clear PHCD bit first. Signed-off-by: Alek Du <alek.du@intel.com> Cc: David Brownell <dbrownell@users.sourceforge.net> Cc: Alan Stern <stern@rowland.harvard.edu> Cc: stable <stable@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
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@ -294,6 +294,16 @@ static int ehci_bus_resume (struct usb_hcd *hcd)
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/* manually resume the ports we suspended during bus_suspend() */
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i = HCS_N_PORTS (ehci->hcs_params);
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while (i--) {
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/* clear phy low power mode before resume */
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if (ehci->has_hostpc) {
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u32 __iomem *hostpc_reg =
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(u32 __iomem *)((u8 *)ehci->regs
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+ HOSTPC0 + 4 * (i & 0xff));
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temp = ehci_readl(ehci, hostpc_reg);
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ehci_writel(ehci, temp & ~HOSTPC_PHCD,
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hostpc_reg);
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mdelay(5);
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}
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temp = ehci_readl(ehci, &ehci->regs->port_status [i]);
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temp &= ~(PORT_RWC_BITS | PORT_WAKE_BITS);
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if (test_bit(i, &ehci->bus_suspended) &&
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@ -678,6 +688,13 @@ static int ehci_hub_control (
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if (temp & PORT_SUSPEND) {
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if ((temp & PORT_PE) == 0)
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goto error;
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/* clear phy low power mode before resume */
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if (hostpc_reg) {
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temp1 = ehci_readl(ehci, hostpc_reg);
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ehci_writel(ehci, temp1 & ~HOSTPC_PHCD,
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hostpc_reg);
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mdelay(5);
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}
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/* resume signaling for 20 msec */
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temp &= ~(PORT_RWC_BITS | PORT_WAKE_BITS);
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ehci_writel(ehci, temp | PORT_RESUME,
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