AuxXxilium/linux_dsm_epyc7002
1
0
Fork 0
mirror of https://github.com/AuxXxilium/linux_dsm_epyc7002.git synced 2024-12-18 18:36:41 +07:00
Code Issues Actions Packages Projects Releases Wiki Activity

net: stmmac: mmc: Add Frame Preemption counters on GMAC5+ cores

Browse Source 
This can be useful for debug. Add these counters on GMAC5+ cores just
like we did for XGMAC.

Signed-off-by: Jose Abreu <Jose.Abreu@synopsys.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Jose Abreu 2019-12-18 11:33:11 +01:00 committed by David S. Miller
parent f0e56c8d8f
commit ea77b8c813
1 changed files with 16 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

16
drivers/net/ethernet/stmicro/stmmac/mmc_core.c
View File

@ -119,6 +119,13 @@
#define MMC_RX_ICMP_GD_OCTETS 0x180 #define MMC_RX_ICMP_GD_OCTETS 0x180
#define MMC_RX_ICMP_ERR_OCTETS 0x184 #define MMC_RX_ICMP_ERR_OCTETS 0x184
#define MMC_TX_FPE_FRAG 0x1a8
#define MMC_TX_HOLD_REQ 0x1ac
#define MMC_RX_PKT_ASSEMBLY_ERR 0x1c8
#define MMC_RX_PKT_SMD_ERR 0x1cc
#define MMC_RX_PKT_ASSEMBLY_OK 0x1d0
#define MMC_RX_FPE_FRAG 0x1d4
/* XGMAC MMC Registers */ /* XGMAC MMC Registers */
#define MMC_XGMAC_TX_OCTET_GB 0x14 #define MMC_XGMAC_TX_OCTET_GB 0x14
#define MMC_XGMAC_TX_PKT_GB 0x1c #define MMC_XGMAC_TX_PKT_GB 0x1c
@ -315,6 +322,15 @@ static void dwmac_mmc_read(void __iomem *mmcaddr, struct stmmac_counters *mmc)
mmc->mmc_rx_tcp_err_octets += readl(mmcaddr + MMC_RX_TCP_ERR_OCTETS); mmc->mmc_rx_tcp_err_octets += readl(mmcaddr + MMC_RX_TCP_ERR_OCTETS);
mmc->mmc_rx_icmp_gd_octets += readl(mmcaddr + MMC_RX_ICMP_GD_OCTETS); mmc->mmc_rx_icmp_gd_octets += readl(mmcaddr + MMC_RX_ICMP_GD_OCTETS);
mmc->mmc_rx_icmp_err_octets += readl(mmcaddr + MMC_RX_ICMP_ERR_OCTETS); mmc->mmc_rx_icmp_err_octets += readl(mmcaddr + MMC_RX_ICMP_ERR_OCTETS);
mmc->mmc_tx_fpe_fragment_cntr += readl(mmcaddr + MMC_TX_FPE_FRAG);
mmc->mmc_tx_hold_req_cntr += readl(mmcaddr + MMC_TX_HOLD_REQ);
mmc->mmc_rx_packet_assembly_err_cntr +=
readl(mmcaddr + MMC_RX_PKT_ASSEMBLY_ERR);
mmc->mmc_rx_packet_smd_err_cntr += readl(mmcaddr + MMC_RX_PKT_SMD_ERR);
mmc->mmc_rx_packet_assembly_ok_cntr +=
readl(mmcaddr + MMC_RX_PKT_ASSEMBLY_OK);
mmc->mmc_rx_fpe_fragment_cntr += readl(mmcaddr + MMC_RX_FPE_FRAG);
} }
const struct stmmac_mmc_ops dwmac_mmc_ops = { const struct stmmac_mmc_ops dwmac_mmc_ops = {