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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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ARM: i.MX25 clk: Use of_clk_init() for DT case
Replace .init_time() hook with of_clk_init() for DT targets. Based on: d4347ee ARM: i.MX27 clk: Use of_clk_init() for DT case Signed-off-by: Denis Carikli <denis@eukrea.com> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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@ -32,8 +32,6 @@
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#include "hardware.h"
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#include "mx25.h"
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#define CRM_BASE MX25_IO_ADDRESS(MX25_CRM_BASE_ADDR)
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#define CCM_MPCTL 0x00
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#define CCM_UPCTL 0x04
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#define CCM_CCTL 0x08
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@ -56,7 +54,7 @@
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#define CCM_LTR3 0x4c
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#define CCM_MCR 0x64
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#define ccm(x) (CRM_BASE + (x))
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#define ccm(x) (ccm_base + (x))
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static struct clk_onecell_data clk_data;
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@ -91,8 +89,11 @@ enum mx25_clks {
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static struct clk *clk[clk_max];
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static int __init __mx25_clocks_init(unsigned long osc_rate)
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static int __init __mx25_clocks_init(unsigned long osc_rate,
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void __iomem *ccm_base)
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{
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BUG_ON(!ccm_base);
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clk[dummy] = imx_clk_fixed("dummy", 0);
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clk[osc] = imx_clk_fixed("osc", osc_rate);
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clk[mpll] = imx_clk_pllv1("mpll", "osc", ccm(CCM_MPCTL));
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@ -240,7 +241,11 @@ static int __init __mx25_clocks_init(unsigned long osc_rate)
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int __init mx25_clocks_init(void)
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{
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__mx25_clocks_init(24000000);
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void __iomem *ccm;
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ccm = ioremap(MX25_CRM_BASE_ADDR, SZ_16K);
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__mx25_clocks_init(24000000, ccm);
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clk_register_clkdev(clk[gpt1_ipg], "ipg", "imx-gpt.0");
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clk_register_clkdev(clk[gpt_ipg_per], "per", "imx-gpt.0");
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@ -308,29 +313,29 @@ int __init mx25_clocks_init(void)
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return 0;
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}
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int __init mx25_clocks_init_dt(void)
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static void __init mx25_clocks_init_dt(struct device_node *np)
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{
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struct device_node *np;
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struct device_node *refnp;
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unsigned long osc_rate = 24000000;
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void __iomem *ccm;
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/* retrieve the freqency of fixed clocks from device tree */
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for_each_compatible_node(np, NULL, "fixed-clock") {
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for_each_compatible_node(refnp, NULL, "fixed-clock") {
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u32 rate;
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if (of_property_read_u32(np, "clock-frequency", &rate))
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if (of_property_read_u32(refnp, "clock-frequency", &rate))
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continue;
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if (of_device_is_compatible(np, "fsl,imx-osc"))
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if (of_device_is_compatible(refnp, "fsl,imx-osc"))
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osc_rate = rate;
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}
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np = of_find_compatible_node(NULL, NULL, "fsl,imx25-ccm");
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ccm = of_iomap(np, 0);
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__mx25_clocks_init(osc_rate, ccm);
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clk_data.clks = clk;
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clk_data.clk_num = ARRAY_SIZE(clk);
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of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data);
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__mx25_clocks_init(osc_rate);
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mxc_timer_init_dt(of_find_compatible_node(NULL, NULL, "fsl,imx25-gpt"));
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return 0;
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}
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CLK_OF_DECLARE(imx25_ccm, "fsl,imx25-ccm", mx25_clocks_init_dt);
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@ -55,7 +55,6 @@ int mx25_clocks_init(void);
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int mx27_clocks_init(unsigned long fref);
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int mx31_clocks_init(unsigned long fref);
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int mx35_clocks_init(void);
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int mx25_clocks_init_dt(void);
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int mx31_clocks_init_dt(void);
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struct platform_device *mxc_register_gpio(char *name, int id,
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resource_size_t iobase, resource_size_t iosize, int irq, int irq_high);
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@ -29,16 +29,10 @@ static const char * const imx25_dt_board_compat[] __initconst = {
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NULL
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};
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static void __init imx25_timer_init(void)
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{
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mx25_clocks_init_dt();
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}
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DT_MACHINE_START(IMX25_DT, "Freescale i.MX25 (Device Tree Support)")
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.map_io = mx25_map_io,
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.init_early = imx25_init_early,
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.init_irq = mx25_init_irq,
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.init_time = imx25_timer_init,
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.init_machine = imx25_dt_init,
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.dt_compat = imx25_dt_board_compat,
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.restart = mxc_restart,
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