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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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arm64: dts: meson-g12a: enable DVFS on G12A boards
Enable DVFS for the U200, SEI520 and X96-Max Amlogic G12A based board by setting the clock, OPP and supply for each CPU cores. The CPU cluster power supply can achieve 0.73V to 1.01V using a PWM output clocked at 800KHz with an inverse duty-cycle. DVFS has been tested by running the arm64 cpuburn at [1] and cycling between all the possible cpufreq translations and checking the final frequency using the clock-measurer, script at [2]. [1] https://github.com/ssvb/cpuburn-arm/blob/master/cpuburn-a53.S [2] https://gist.github.com/superna9999/d4de964dbc0f84b7d527e1df2ddea25f Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Kevin Hilman <khilman@baylibre.com> Tested-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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@ -129,6 +129,25 @@ vddao_3v3_t: regultor-vddao_3v3_t {
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enable-active-high;
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};
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vddcpu: regulator-vddcpu {
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/*
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* SY8120B1ABC DC/DC Regulator.
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*/
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compatible = "pwm-regulator";
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regulator-name = "VDDCPU";
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regulator-min-microvolt = <721000>;
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regulator-max-microvolt = <1022000>;
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vin-supply = <&dc_in>;
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pwms = <&pwm_AO_cd 1 1250 0>;
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pwm-dutycycle-range = <100 0>;
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regulator-boot-on;
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regulator-always-on;
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};
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vddio_ao1v8: regulator-vddio_ao1v8 {
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compatible = "regulator-fixed";
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regulator-name = "VDDIO_AO1V8";
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@ -297,6 +316,34 @@ &clkc_audio {
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status = "okay";
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};
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&cpu0 {
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cpu-supply = <&vddcpu>;
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operating-points-v2 = <&cpu_opp_table>;
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clocks = <&clkc CLKID_CPU_CLK>;
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clock-latency = <50000>;
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};
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&cpu1 {
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cpu-supply = <&vddcpu>;
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operating-points-v2 = <&cpu_opp_table>;
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clocks = <&clkc CLKID_CPU_CLK>;
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clock-latency = <50000>;
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};
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&cpu2 {
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cpu-supply = <&vddcpu>;
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operating-points-v2 = <&cpu_opp_table>;
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clocks = <&clkc CLKID_CPU_CLK>;
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clock-latency = <50000>;
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};
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&cpu3 {
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cpu-supply = <&vddcpu>;
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operating-points-v2 = <&cpu_opp_table>;
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clocks = <&clkc CLKID_CPU_CLK>;
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clock-latency = <50000>;
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};
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&cvbs_vdac_port {
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cvbs_vdac_out: endpoint {
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remote-endpoint = <&cvbs_connector_in>;
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@ -345,6 +392,14 @@ &ir {
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pinctrl-names = "default";
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};
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&pwm_AO_cd {
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pinctrl-0 = <&pwm_ao_d_e_pins>;
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pinctrl-names = "default";
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clocks = <&xtal>;
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clock-names = "clkin1";
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status = "okay";
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};
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&pwm_ef {
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status = "okay";
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pinctrl-0 = <&pwm_e_pins>;
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@ -129,6 +129,24 @@ vddao_3v3: regulator-vddao_3v3 {
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regulator-always-on;
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};
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vddcpu: regulator-vddcpu {
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/*
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* MP8756GD Regulator.
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*/
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compatible = "pwm-regulator";
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regulator-name = "VDDCPU";
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regulator-min-microvolt = <721000>;
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regulator-max-microvolt = <1022000>;
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vin-supply = <&main_12v>;
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pwms = <&pwm_AO_cd 1 1250 0>;
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pwm-dutycycle-range = <100 0>;
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regulator-boot-on;
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regulator-always-on;
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};
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};
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&cec_AO {
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@ -145,6 +163,34 @@ &cecb_AO {
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hdmi-phandle = <&hdmi_tx>;
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};
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&cpu0 {
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cpu-supply = <&vddcpu>;
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operating-points-v2 = <&cpu_opp_table>;
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clocks = <&clkc CLKID_CPU_CLK>;
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clock-latency = <50000>;
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};
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&cpu1 {
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cpu-supply = <&vddcpu>;
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operating-points-v2 = <&cpu_opp_table>;
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clocks = <&clkc CLKID_CPU_CLK>;
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clock-latency = <50000>;
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};
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&cpu2 {
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cpu-supply = <&vddcpu>;
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operating-points-v2 = <&cpu_opp_table>;
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clocks = <&clkc CLKID_CPU_CLK>;
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clock-latency = <50000>;
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};
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&cpu3 {
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cpu-supply = <&vddcpu>;
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operating-points-v2 = <&cpu_opp_table>;
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clocks = <&clkc CLKID_CPU_CLK>;
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clock-latency = <50000>;
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};
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&cvbs_vdac_port {
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cvbs_vdac_out: endpoint {
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remote-endpoint = <&cvbs_connector_in>;
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@ -197,6 +243,14 @@ &i2c3 {
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pinctrl-names = "default";
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};
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&pwm_AO_cd {
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pinctrl-0 = <&pwm_ao_d_e_pins>;
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pinctrl-names = "default";
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clocks = <&xtal>;
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clock-names = "clkin1";
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status = "okay";
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};
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/* SD card */
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&sd_emmc_b {
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status = "okay";
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@ -132,6 +132,22 @@ vddao_3v3: regulator-vddao_3v3 {
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regulator-always-on;
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};
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vddcpu: regulator-vddcpu {
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compatible = "pwm-regulator";
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regulator-name = "VDDCPU";
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regulator-min-microvolt = <721000>;
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regulator-max-microvolt = <1022000>;
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vin-supply = <&dc_in>;
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pwms = <&pwm_AO_cd 1 1250 0>;
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pwm-dutycycle-range = <100 0>;
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regulator-boot-on;
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regulator-always-on;
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};
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sound {
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compatible = "amlogic,axg-sound-card";
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model = "G12A-X96-MAX";
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@ -242,6 +258,34 @@ &clkc_audio {
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status = "okay";
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};
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&cpu0 {
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cpu-supply = <&vddcpu>;
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operating-points-v2 = <&cpu_opp_table>;
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clocks = <&clkc CLKID_CPU_CLK>;
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clock-latency = <50000>;
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};
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&cpu1 {
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cpu-supply = <&vddcpu>;
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operating-points-v2 = <&cpu_opp_table>;
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clocks = <&clkc CLKID_CPU_CLK>;
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clock-latency = <50000>;
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};
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&cpu2 {
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cpu-supply = <&vddcpu>;
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operating-points-v2 = <&cpu_opp_table>;
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clocks = <&clkc CLKID_CPU_CLK>;
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clock-latency = <50000>;
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};
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&cpu3 {
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cpu-supply = <&vddcpu>;
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operating-points-v2 = <&cpu_opp_table>;
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clocks = <&clkc CLKID_CPU_CLK>;
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clock-latency = <50000>;
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};
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&cvbs_vdac_port {
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cvbs_vdac_out: endpoint {
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remote-endpoint = <&cvbs_connector_in>;
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@ -279,6 +323,14 @@ &ir {
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pinctrl-names = "default";
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};
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&pwm_AO_cd {
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pinctrl-0 = <&pwm_ao_d_e_pins>;
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pinctrl-names = "default";
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clocks = <&xtal>;
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clock-names = "clkin1";
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status = "okay";
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};
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&ext_mdio {
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external_phy: ethernet-phy@0 {
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/* Realtek RTL8211F (0x001cc916) */
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