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serial: sh-sci: Fix off-by-one error in FIFO threshold register setting

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commit 2ea2e019c190ee3973ef7bcaf829d8762e56e635 upstream.

The Receive FIFO Data Count Trigger field (RTRG[6:0]) in the Receive
FIFO Data Count Trigger Register (HSRTRGR) of HSCIF can only hold values
ranging from 0-127.  As the FIFO size is equal to 128 on HSCIF, the user
can write an out-of-range value, touching reserved bits.

Fix this by limiting the trigger value to the FIFO size minus one.
Reverse the order of the checks, to avoid rx_trig becoming zero if the
FIFO size is one.

Note that this change has no impact on other SCIF variants, as their
maximum supported trigger value is lower than the FIFO size anyway, and
the code below takes care of enforcing these limits.

Fixes: a380ed461f ("serial: sh-sci: implement FIFO threshold register setting")
Reported-by: Linh Phung <linh.phung.jy@renesas.com>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Ulrich Hecht <uli+renesas@fpond.eu>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Cc: stable <stable@vger.kernel.org>
Link: https://lore.kernel.org/r/5eff320aef92ffb33d00e57979fd3603bbb4a70f.1620648218.git.geert+renesas@glider.be
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Geert Uytterhoeven 2021-05-10 14:07:55 +02:00 committed by Greg Kroah-Hartman
parent 604c654323
commit e955711701
1 changed files with 2 additions and 2 deletions
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4
drivers/tty/serial/sh-sci.c
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@ -1023,10 +1023,10 @@ static int scif_set_rtrg(struct uart_port *port, int rx_trig)
{ {
unsigned int bits; unsigned int bits;
if (rx_trig >= port->fifosize)
rx_trig = port->fifosize - 1;
if (rx_trig < 1) if (rx_trig < 1)
rx_trig = 1; rx_trig = 1;
if (rx_trig >= port->fifosize)
rx_trig = port->fifosize;
/* HSCIF can be set to an arbitrary level. */ /* HSCIF can be set to an arbitrary level. */
if (sci_getreg(port, HSRTRGR)->size) { if (sci_getreg(port, HSRTRGR)->size) {