KVM: x86 emulator: simplify emulate_1op_rax_rdx()

emulate_1op_rax_rdx() is always called with the same parameters.  Simplify
by passing just the emulation context.

Signed-off-by: Avi Kivity <avi@redhat.com>
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
This commit is contained in:
Avi Kivity 2011-09-07 16:41:40 +03:00
parent 9fef72ce10
commit e8f2b1d621

View File

@ -322,9 +322,11 @@ struct gprefix {
} \ } \
} while (0) } while (0)
#define __emulate_1op_rax_rdx(_op, _src, _rax, _rdx, _eflags, _suffix, _ex) \ #define __emulate_1op_rax_rdx(ctxt, _op, _suffix, _ex) \
do { \ do { \
unsigned long _tmp; \ unsigned long _tmp; \
ulong *rax = &(ctxt)->regs[VCPU_REGS_RAX]; \
ulong *rdx = &(ctxt)->regs[VCPU_REGS_RDX]; \
\ \
__asm__ __volatile__ ( \ __asm__ __volatile__ ( \
_PRE_EFLAGS("0", "5", "1") \ _PRE_EFLAGS("0", "5", "1") \
@ -337,31 +339,27 @@ struct gprefix {
"jmp 2b \n\t" \ "jmp 2b \n\t" \
".popsection \n\t" \ ".popsection \n\t" \
_ASM_EXTABLE(1b, 3b) \ _ASM_EXTABLE(1b, 3b) \
: "=m" (_eflags), "=&r" (_tmp), \ : "=m" ((ctxt)->eflags), "=&r" (_tmp), \
"+a" (_rax), "+d" (_rdx), "+qm"(_ex) \ "+a" (*rax), "+d" (*rdx), "+qm"(_ex) \
: "i" (EFLAGS_MASK), "m" ((_src).val), \ : "i" (EFLAGS_MASK), "m" ((ctxt)->src.val), \
"a" (_rax), "d" (_rdx)); \ "a" (*rax), "d" (*rdx)); \
} while (0) } while (0)
/* instruction has only one source operand, destination is implicit (e.g. mul, div, imul, idiv) */ /* instruction has only one source operand, destination is implicit (e.g. mul, div, imul, idiv) */
#define emulate_1op_rax_rdx(_op, _src, _rax, _rdx, _eflags, _ex) \ #define emulate_1op_rax_rdx(ctxt, _op, _ex) \
do { \ do { \
switch((_src).bytes) { \ switch((ctxt)->src.bytes) { \
case 1: \ case 1: \
__emulate_1op_rax_rdx(_op, _src, _rax, _rdx, \ __emulate_1op_rax_rdx(ctxt, _op, "b", _ex); \
_eflags, "b", _ex); \
break; \ break; \
case 2: \ case 2: \
__emulate_1op_rax_rdx(_op, _src, _rax, _rdx, \ __emulate_1op_rax_rdx(ctxt, _op, "w", _ex); \
_eflags, "w", _ex); \
break; \ break; \
case 4: \ case 4: \
__emulate_1op_rax_rdx(_op, _src, _rax, _rdx, \ __emulate_1op_rax_rdx(ctxt, _op, "l", _ex); \
_eflags, "l", _ex); \
break; \ break; \
case 8: ON64( \ case 8: ON64( \
__emulate_1op_rax_rdx(_op, _src, _rax, _rdx, \ __emulate_1op_rax_rdx(ctxt, _op, "q", _ex)); \
_eflags, "q", _ex)); \
break; \ break; \
} \ } \
} while (0) } while (0)
@ -1667,8 +1665,6 @@ static int em_grp2(struct x86_emulate_ctxt *ctxt)
static int em_grp3(struct x86_emulate_ctxt *ctxt) static int em_grp3(struct x86_emulate_ctxt *ctxt)
{ {
unsigned long *rax = &ctxt->regs[VCPU_REGS_RAX];
unsigned long *rdx = &ctxt->regs[VCPU_REGS_RDX];
u8 de = 0; u8 de = 0;
switch (ctxt->modrm_reg) { switch (ctxt->modrm_reg) {
@ -1682,20 +1678,16 @@ static int em_grp3(struct x86_emulate_ctxt *ctxt)
emulate_1op(ctxt, "neg"); emulate_1op(ctxt, "neg");
break; break;
case 4: /* mul */ case 4: /* mul */
emulate_1op_rax_rdx("mul", ctxt->src, *rax, *rdx, emulate_1op_rax_rdx(ctxt, "mul", de);
ctxt->eflags, de);
break; break;
case 5: /* imul */ case 5: /* imul */
emulate_1op_rax_rdx("imul", ctxt->src, *rax, *rdx, emulate_1op_rax_rdx(ctxt, "imul", de);
ctxt->eflags, de);
break; break;
case 6: /* div */ case 6: /* div */
emulate_1op_rax_rdx("div", ctxt->src, *rax, *rdx, emulate_1op_rax_rdx(ctxt, "div", de);
ctxt->eflags, de);
break; break;
case 7: /* idiv */ case 7: /* idiv */
emulate_1op_rax_rdx("idiv", ctxt->src, *rax, *rdx, emulate_1op_rax_rdx(ctxt, "idiv", de);
ctxt->eflags, de);
break; break;
default: default:
return X86EMUL_UNHANDLEABLE; return X86EMUL_UNHANDLEABLE;