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habanalabs: Add busy engines bitmask to HW idle IOCTL
The information which is currently provided as a response to the "HL_INFO_HW_IDLE" IOCTL is merely a general boolean value. This patch extends it and provides also a bitmask that indicates which of the device engines are busy. Signed-off-by: Tomer Tayar <ttayar@habana.ai> Reviewed-by: Oded Gabbay <oded.gabbay@gmail.com> Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
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@ -506,7 +506,7 @@ static int engines_show(struct seq_file *s, void *data)
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struct hl_dbg_device_entry *dev_entry = entry->dev_entry;
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struct hl_device *hdev = dev_entry->hdev;
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hdev->asic_funcs->is_device_idle(hdev, s);
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hdev->asic_funcs->is_device_idle(hdev, NULL, s);
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return 0;
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}
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@ -2828,7 +2828,7 @@ static int goya_send_job_on_qman0(struct hl_device *hdev, struct hl_cs_job *job)
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else
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timeout = HL_DEVICE_TIMEOUT_USEC;
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if (!hdev->asic_funcs->is_device_idle(hdev, NULL)) {
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if (!hdev->asic_funcs->is_device_idle(hdev, NULL, NULL)) {
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dev_err_ratelimited(hdev->dev,
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"Can't send KMD job on QMAN0 because the device is not idle\n");
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return -EBUSY;
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@ -4914,7 +4914,8 @@ int goya_armcp_info_get(struct hl_device *hdev)
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return 0;
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}
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static bool goya_is_device_idle(struct hl_device *hdev, struct seq_file *s)
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static bool goya_is_device_idle(struct hl_device *hdev, u32 *mask,
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struct seq_file *s)
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{
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const char *fmt = "%-5d%-9s%#-14x%#-16x%#x\n";
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const char *dma_fmt = "%-5d%-9s%#-14x%#x\n";
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@ -4937,6 +4938,8 @@ static bool goya_is_device_idle(struct hl_device *hdev, struct seq_file *s)
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IS_DMA_IDLE(dma_core_sts0);
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is_idle &= is_eng_idle;
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if (mask)
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*mask |= !is_eng_idle << (GOYA_ENGINE_ID_DMA_0 + i);
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if (s)
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seq_printf(s, dma_fmt, i, is_eng_idle ? "Y" : "N",
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qm_glbl_sts0, dma_core_sts0);
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@ -4958,6 +4961,8 @@ static bool goya_is_device_idle(struct hl_device *hdev, struct seq_file *s)
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IS_TPC_IDLE(tpc_cfg_sts);
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is_idle &= is_eng_idle;
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if (mask)
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*mask |= !is_eng_idle << (GOYA_ENGINE_ID_TPC_0 + i);
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if (s)
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seq_printf(s, fmt, i, is_eng_idle ? "Y" : "N",
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qm_glbl_sts0, cmdq_glbl_sts0, tpc_cfg_sts);
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@ -4976,6 +4981,8 @@ static bool goya_is_device_idle(struct hl_device *hdev, struct seq_file *s)
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IS_MME_IDLE(mme_arch_sts);
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is_idle &= is_eng_idle;
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if (mask)
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*mask |= !is_eng_idle << GOYA_ENGINE_ID_MME_0;
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if (s) {
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seq_printf(s, fmt, 0, is_eng_idle ? "Y" : "N", qm_glbl_sts0,
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cmdq_glbl_sts0, mme_arch_sts);
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@ -557,7 +557,8 @@ struct hl_asic_funcs {
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u32 asid, u64 va, u64 size);
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int (*send_heartbeat)(struct hl_device *hdev);
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int (*debug_coresight)(struct hl_device *hdev, void *data);
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bool (*is_device_idle)(struct hl_device *hdev, struct seq_file *s);
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bool (*is_device_idle)(struct hl_device *hdev, u32 *mask,
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struct seq_file *s);
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int (*soft_reset_late_init)(struct hl_device *hdev);
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void (*hw_queues_lock)(struct hl_device *hdev);
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void (*hw_queues_unlock)(struct hl_device *hdev);
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@ -119,7 +119,8 @@ static int hw_idle(struct hl_device *hdev, struct hl_info_args *args)
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if ((!max_size) || (!out))
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return -EINVAL;
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hw_idle.is_idle = hdev->asic_funcs->is_device_idle(hdev, NULL);
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hw_idle.is_idle = hdev->asic_funcs->is_device_idle(hdev,
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&hw_idle.busy_engines_mask, NULL);
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return copy_to_user(out, &hw_idle,
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min((size_t) max_size, sizeof(hw_idle))) ? -EFAULT : 0;
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@ -45,6 +45,30 @@ enum goya_queue_id {
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GOYA_QUEUE_ID_SIZE
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};
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/*
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* Engine Numbering
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*
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* Used in the "busy_engines_mask" field in `struct hl_info_hw_idle'
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*/
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enum goya_engine_id {
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GOYA_ENGINE_ID_DMA_0 = 0,
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GOYA_ENGINE_ID_DMA_1,
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GOYA_ENGINE_ID_DMA_2,
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GOYA_ENGINE_ID_DMA_3,
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GOYA_ENGINE_ID_DMA_4,
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GOYA_ENGINE_ID_MME_0,
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GOYA_ENGINE_ID_TPC_0,
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GOYA_ENGINE_ID_TPC_1,
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GOYA_ENGINE_ID_TPC_2,
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GOYA_ENGINE_ID_TPC_3,
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GOYA_ENGINE_ID_TPC_4,
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GOYA_ENGINE_ID_TPC_5,
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GOYA_ENGINE_ID_TPC_6,
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GOYA_ENGINE_ID_TPC_7,
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GOYA_ENGINE_ID_SIZE
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};
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enum hl_device_status {
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HL_DEVICE_STATUS_OPERATIONAL,
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HL_DEVICE_STATUS_IN_RESET,
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@ -86,7 +110,11 @@ struct hl_info_dram_usage {
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struct hl_info_hw_idle {
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__u32 is_idle;
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__u32 pad;
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/*
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* Bitmask of busy engines.
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* Bits definition is according to `enum <chip>_enging_id'.
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*/
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__u32 busy_engines_mask;
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};
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struct hl_info_device_status {
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