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drm/amdgpu/powerplay: get SMC FW size to a flexible way

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Get SMC fw size before backdoor loading instead of giving an
certain value, as it may different for different ASIC.

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Kevin Wang <kevin1.wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Likun Gao 2019-09-16 11:37:42 +08:00 committed by Alex Deucher
parent dadce777e0
commit e8663832b0
2 changed files with 3 additions and 2 deletions
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1
drivers/gpu/drm/amd/powerplay/inc/smu_v11_0.h
View File

@ -37,7 +37,6 @@
#define MP0_SRAM 0x03900000
#define MP1_Public 0x03b00000
#define MP1_SRAM 0x03c00004
#define MP1_SMC_SIZE 0x40000
/* address block */
#define smnMP1_FIRMWARE_FLAGS 0x3010024

4
drivers/gpu/drm/amd/powerplay/smu_v11_0.c
View File

@ -201,13 +201,15 @@ int smu_v11_0_load_microcode(struct smu_context *smu)
const struct smc_firmware_header_v1_0 *hdr;
uint32_t addr_start = MP1_SRAM;
uint32_t i;
uint32_t smc_fw_size;
uint32_t mp1_fw_flags;
hdr = (const struct smc_firmware_header_v1_0 *) adev->pm.fw->data;
src = (const uint32_t *)(adev->pm.fw->data +
le32_to_cpu(hdr->header.ucode_array_offset_bytes));
smc_fw_size = hdr->header.ucode_size_bytes;
for (i = 1; i < MP1_SMC_SIZE/4 - 1; i++) {
for (i = 1; i < smc_fw_size/4 - 1; i++) {
WREG32_PCIE(addr_start, src[i]);
addr_start += 4;
}