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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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RealView: Add support for the Cortex-A8 Platform Baseboard
This patch adds support for RealView/PB-A8, a platform based on Cortex-A8 with support for PCI-E and compact flash. Signed-off-by: Bahadir Balban <bahadir.balban@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
This commit is contained in:
Bahadir Balban
Catalin Marinas
parent
70bb62f8ec
commit
e7c70825a7
@ -37,6 +37,15 @@ config MACH_REALVIEW_PB1176
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help
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Include support for the ARM(R) RealView ARM1176 Platform Baseboard.
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config MACH_REALVIEW_PBA8
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bool "Support RealView/PB-A8 platform"
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select CPU_V7
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select ARM_GIC
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help
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Include support for the ARM(R) RealView Cortex-A8 Platform Baseboard.
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PB-A8 is a platform with an on-board Cortex-A8 and has support for
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PCI-E and Compact Flash.
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config REALVIEW_HIGH_PHYS_OFFSET
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bool "High physical base address for the RealView platform"
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depends on !MACH_REALVIEW_PB1176
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@ -6,5 +6,6 @@ obj-y := core.o clock.o
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obj-$(CONFIG_MACH_REALVIEW_EB) += realview_eb.o
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obj-$(CONFIG_MACH_REALVIEW_PB11MP) += realview_pb11mp.o
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obj-$(CONFIG_MACH_REALVIEW_PB1176) += realview_pb1176.o
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obj-$(CONFIG_MACH_REALVIEW_PBA8) += realview_pba8.o
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obj-$(CONFIG_SMP) += platsmp.o headsmp.o localtimer.o
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obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o
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152
arch/arm/mach-realview/include/mach/board-pba8.h
Normal file
152
arch/arm/mach-realview/include/mach/board-pba8.h
Normal file
@ -0,0 +1,152 @@
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/*
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* include/asm-arm/arch-realview/board-pba8.h
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*
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* Copyright (C) 2008 ARM Limited
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
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* MA 02110-1301, USA.
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*/
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#ifndef __ASM_ARCH_BOARD_PBA8_H
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#define __ASM_ARCH_BOARD_PBA8_H
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#include <mach/platform.h>
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/*
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* Peripheral addresses
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*/
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#define REALVIEW_PBA8_UART0_BASE 0x10009000 /* UART 0 */
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#define REALVIEW_PBA8_UART1_BASE 0x1000A000 /* UART 1 */
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#define REALVIEW_PBA8_UART2_BASE 0x1000B000 /* UART 2 */
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#define REALVIEW_PBA8_UART3_BASE 0x1000C000 /* UART 3 */
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#define REALVIEW_PBA8_SSP_BASE 0x1000D000 /* Synchronous Serial Port */
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#define REALVIEW_PBA8_WATCHDOG0_BASE 0x1000F000 /* Watchdog 0 */
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#define REALVIEW_PBA8_WATCHDOG_BASE 0x10010000 /* watchdog interface */
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#define REALVIEW_PBA8_TIMER0_1_BASE 0x10011000 /* Timer 0 and 1 */
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#define REALVIEW_PBA8_TIMER2_3_BASE 0x10012000 /* Timer 2 and 3 */
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#define REALVIEW_PBA8_GPIO0_BASE 0x10013000 /* GPIO port 0 */
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#define REALVIEW_PBA8_RTC_BASE 0x10017000 /* Real Time Clock */
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#define REALVIEW_PBA8_TIMER4_5_BASE 0x10018000 /* Timer 4/5 */
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#define REALVIEW_PBA8_TIMER6_7_BASE 0x10019000 /* Timer 6/7 */
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#define REALVIEW_PBA8_SCTL_BASE 0x1001A000 /* System Controller */
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#define REALVIEW_PBA8_CLCD_BASE 0x10020000 /* CLCD */
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#define REALVIEW_PBA8_ONB_SRAM_BASE 0x10060000 /* On-board SRAM */
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#define REALVIEW_PBA8_DMC_BASE 0x100E0000 /* DMC configuration */
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#define REALVIEW_PBA8_SMC_BASE 0x100E1000 /* SMC configuration */
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#define REALVIEW_PBA8_CAN_BASE 0x100E2000 /* CAN bus */
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#define REALVIEW_PBA8_CF_BASE 0x18000000 /* Compact flash */
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#define REALVIEW_PBA8_CF_MEM_BASE 0x18003000 /* SMC for Compact flash */
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#define REALVIEW_PBA8_GIC_CPU_BASE 0x1E000000 /* Generic interrupt controller CPU interface */
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#define REALVIEW_PBA8_FLASH0_BASE 0x40000000
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#define REALVIEW_PBA8_FLASH0_SIZE SZ_64M
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#define REALVIEW_PBA8_FLASH1_BASE 0x44000000
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#define REALVIEW_PBA8_FLASH1_SIZE SZ_64M
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#define REALVIEW_PBA8_ETH_BASE 0x4E000000 /* Ethernet */
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#define REALVIEW_PBA8_USB_BASE 0x4F000000 /* USB */
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#define REALVIEW_PBA8_GIC_DIST_BASE 0x1E001000 /* Generic interrupt controller distributor */
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#define REALVIEW_PBA8_LT_BASE 0xC0000000 /* Logic Tile expansion */
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#define REALVIEW_PBA8_SDRAM6_BASE 0x70000000 /* SDRAM bank 6 256MB */
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#define REALVIEW_PBA8_SDRAM7_BASE 0x80000000 /* SDRAM bank 7 256MB */
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#define REALVIEW_PBA8_SYS_PLD_CTRL1 0x74
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/*
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* PBA8 PCI regions
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*/
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#define REALVIEW_PBA8_PCI_BASE 0x90040000 /* PCI-X Unit base */
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#define REALVIEW_PBA8_PCI_IO_BASE 0x90050000 /* IO Region on AHB */
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#define REALVIEW_PBA8_PCI_MEM_BASE 0xA0000000 /* MEM Region on AHB */
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#define REALVIEW_PBA8_PCI_BASE_SIZE 0x10000 /* 16 Kb */
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#define REALVIEW_PBA8_PCI_IO_SIZE 0x1000 /* 4 Kb */
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#define REALVIEW_PBA8_PCI_MEM_SIZE 0x20000000 /* 512 MB */
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/*
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* Irqs
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*/
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#define IRQ_PBA8_GIC_START 32
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/* L220
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#define IRQ_PBA8_L220_EVENT (IRQ_PBA8_GIC_START + 29)
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#define IRQ_PBA8_L220_SLAVE (IRQ_PBA8_GIC_START + 30)
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#define IRQ_PBA8_L220_DECODE (IRQ_PBA8_GIC_START + 31)
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*/
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/*
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* PB-A8 on-board gic irq sources
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*/
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#define IRQ_PBA8_WATCHDOG (IRQ_PBA8_GIC_START + 0) /* Watchdog timer */
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#define IRQ_PBA8_SOFT (IRQ_PBA8_GIC_START + 1) /* Software interrupt */
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#define IRQ_PBA8_COMMRx (IRQ_PBA8_GIC_START + 2) /* Debug Comm Rx interrupt */
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#define IRQ_PBA8_COMMTx (IRQ_PBA8_GIC_START + 3) /* Debug Comm Tx interrupt */
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#define IRQ_PBA8_TIMER0_1 (IRQ_PBA8_GIC_START + 4) /* Timer 0/1 (default timer) */
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#define IRQ_PBA8_TIMER2_3 (IRQ_PBA8_GIC_START + 5) /* Timer 2/3 */
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#define IRQ_PBA8_GPIO0 (IRQ_PBA8_GIC_START + 6) /* GPIO 0 */
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#define IRQ_PBA8_GPIO1 (IRQ_PBA8_GIC_START + 7) /* GPIO 1 */
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#define IRQ_PBA8_GPIO2 (IRQ_PBA8_GIC_START + 8) /* GPIO 2 */
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/* 9 reserved */
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#define IRQ_PBA8_RTC (IRQ_PBA8_GIC_START + 10) /* Real Time Clock */
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#define IRQ_PBA8_SSP (IRQ_PBA8_GIC_START + 11) /* Synchronous Serial Port */
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#define IRQ_PBA8_UART0 (IRQ_PBA8_GIC_START + 12) /* UART 0 on development chip */
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#define IRQ_PBA8_UART1 (IRQ_PBA8_GIC_START + 13) /* UART 1 on development chip */
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#define IRQ_PBA8_UART2 (IRQ_PBA8_GIC_START + 14) /* UART 2 on development chip */
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#define IRQ_PBA8_UART3 (IRQ_PBA8_GIC_START + 15) /* UART 3 on development chip */
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#define IRQ_PBA8_SCI (IRQ_PBA8_GIC_START + 16) /* Smart Card Interface */
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#define IRQ_PBA8_MMCI0A (IRQ_PBA8_GIC_START + 17) /* Multimedia Card 0A */
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#define IRQ_PBA8_MMCI0B (IRQ_PBA8_GIC_START + 18) /* Multimedia Card 0B */
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#define IRQ_PBA8_AACI (IRQ_PBA8_GIC_START + 19) /* Audio Codec */
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#define IRQ_PBA8_KMI0 (IRQ_PBA8_GIC_START + 20) /* Keyboard/Mouse port 0 */
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#define IRQ_PBA8_KMI1 (IRQ_PBA8_GIC_START + 21) /* Keyboard/Mouse port 1 */
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#define IRQ_PBA8_CHARLCD (IRQ_PBA8_GIC_START + 22) /* Character LCD */
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#define IRQ_PBA8_CLCD (IRQ_PBA8_GIC_START + 23) /* CLCD controller */
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#define IRQ_PBA8_DMAC (IRQ_PBA8_GIC_START + 24) /* DMA controller */
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#define IRQ_PBA8_PWRFAIL (IRQ_PBA8_GIC_START + 25) /* Power failure */
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#define IRQ_PBA8_PISMO (IRQ_PBA8_GIC_START + 26) /* PISMO interface */
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#define IRQ_PBA8_DoC (IRQ_PBA8_GIC_START + 27) /* Disk on Chip memory controller */
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#define IRQ_PBA8_ETH (IRQ_PBA8_GIC_START + 28) /* Ethernet controller */
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#define IRQ_PBA8_USB (IRQ_PBA8_GIC_START + 29) /* USB controller */
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#define IRQ_PBA8_TSPEN (IRQ_PBA8_GIC_START + 30) /* Touchscreen pen */
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#define IRQ_PBA8_TSKPAD (IRQ_PBA8_GIC_START + 31) /* Touchscreen keypad */
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/* ... */
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#define IRQ_PBA8_PCI0 (IRQ_PBA8_GIC_START + 50)
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#define IRQ_PBA8_PCI1 (IRQ_PBA8_GIC_START + 51)
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#define IRQ_PBA8_PCI2 (IRQ_PBA8_GIC_START + 52)
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#define IRQ_PBA8_PCI3 (IRQ_PBA8_GIC_START + 53)
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#define IRQ_PBA8_SMC -1
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#define IRQ_PBA8_SCTL -1
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#define NR_GIC_PBA8 1
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/*
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* Only define NR_IRQS if less than NR_IRQS_PBA8
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*/
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#define NR_IRQS_PBA8 (IRQ_PBA8_GIC_START + 64)
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#if defined(CONFIG_MACH_REALVIEW_PBA8)
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#if !defined(NR_IRQS) || (NR_IRQS < NR_IRQS_PBA8)
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#undef NR_IRQS
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#define NR_IRQS NR_IRQS_PBA8
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#endif
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#if !defined(MAX_GIC_NR) || (MAX_GIC_NR < NR_GIC_PBA8)
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#undef MAX_GIC_NR
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#define MAX_GIC_NR NR_GIC_PBA8
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#endif
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#endif /* CONFIG_MACH_REALVIEW_PBA8 */
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#endif /* __ASM_ARCH_BOARD_PBA8_H */
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@ -11,7 +11,8 @@
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*/
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#if defined(CONFIG_MACH_REALVIEW_EB) || \
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defined(CONFIG_MACH_REALVIEW_PB11MP)
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defined(CONFIG_MACH_REALVIEW_PB11MP) || \
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defined(CONFIG_MACH_REALVIEW_PBA8)
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#ifndef DEBUG_LL_UART_OFFSET
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#define DEBUG_LL_UART_OFFSET 0x00009000
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#elif DEBUG_LL_UART_OFFSET != 0x00009000
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@ -25,6 +25,7 @@
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#include <mach/board-eb.h>
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#include <mach/board-pb11mp.h>
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#include <mach/board-pb1176.h>
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#include <mach/board-pba8.h>
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#define IRQ_LOCALTIMER 29
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#define IRQ_LOCALWDOG 30
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@ -23,6 +23,7 @@
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#include <mach/board-eb.h>
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#include <mach/board-pb11mp.h>
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#include <mach/board-pb1176.h>
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#include <mach/board-pba8.h>
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#define AMBA_UART_DR(base) (*(volatile unsigned char *)((base) + 0x00))
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#define AMBA_UART_LCRH(base) (*(volatile unsigned char *)((base) + 0x2c))
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@ -40,6 +41,8 @@ static inline unsigned long get_uart_base(void)
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return REALVIEW_PB11MP_UART0_BASE;
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else if (machine_is_realview_pb1176())
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return REALVIEW_PB1176_UART0_BASE;
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else if (machine_is_realview_pba8())
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return REALVIEW_PBA8_UART0_BASE;
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else
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return 0;
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}
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307
arch/arm/mach-realview/realview_pba8.c
Normal file
307
arch/arm/mach-realview/realview_pba8.c
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@ -0,0 +1,307 @@
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/*
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* linux/arch/arm/mach-realview/realview_pba8.c
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*
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* Copyright (C) 2008 ARM Limited
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* Copyright (C) 2000 Deep Blue Solutions Ltd
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/sysdev.h>
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#include <linux/amba/bus.h>
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#include <linux/io.h>
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#include <asm/irq.h>
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#include <asm/leds.h>
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#include <asm/mach-types.h>
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#include <asm/hardware/gic.h>
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#include <asm/hardware/icst307.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/map.h>
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#include <asm/mach/mmc.h>
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#include <asm/mach/time.h>
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#include <mach/hardware.h>
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#include <mach/board-pba8.h>
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#include <mach/irqs.h>
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#include "core.h"
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#include "clock.h"
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static struct map_desc realview_pba8_io_desc[] __initdata = {
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{
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.virtual = IO_ADDRESS(REALVIEW_SYS_BASE),
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.pfn = __phys_to_pfn(REALVIEW_SYS_BASE),
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.length = SZ_4K,
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.type = MT_DEVICE,
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}, {
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.virtual = IO_ADDRESS(REALVIEW_PBA8_GIC_CPU_BASE),
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.pfn = __phys_to_pfn(REALVIEW_PBA8_GIC_CPU_BASE),
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.length = SZ_4K,
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.type = MT_DEVICE,
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}, {
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.virtual = IO_ADDRESS(REALVIEW_PBA8_GIC_DIST_BASE),
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.pfn = __phys_to_pfn(REALVIEW_PBA8_GIC_DIST_BASE),
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.length = SZ_4K,
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.type = MT_DEVICE,
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}, {
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.virtual = IO_ADDRESS(REALVIEW_SCTL_BASE),
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.pfn = __phys_to_pfn(REALVIEW_SCTL_BASE),
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.length = SZ_4K,
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.type = MT_DEVICE,
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}, {
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.virtual = IO_ADDRESS(REALVIEW_PBA8_TIMER0_1_BASE),
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.pfn = __phys_to_pfn(REALVIEW_PBA8_TIMER0_1_BASE),
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.length = SZ_4K,
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.type = MT_DEVICE,
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}, {
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.virtual = IO_ADDRESS(REALVIEW_PBA8_TIMER2_3_BASE),
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.pfn = __phys_to_pfn(REALVIEW_PBA8_TIMER2_3_BASE),
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.length = SZ_4K,
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.type = MT_DEVICE,
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},
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#ifdef CONFIG_PCI
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{
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.virtual = PCIX_UNIT_BASE,
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.pfn = __phys_to_pfn(REALVIEW_PBA8_PCI_BASE),
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.length = REALVIEW_PBA8_PCI_BASE_SIZE,
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.type = MT_DEVICE
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},
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#endif
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#ifdef CONFIG_DEBUG_LL
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{
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.virtual = IO_ADDRESS(REALVIEW_PBA8_UART0_BASE),
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.pfn = __phys_to_pfn(REALVIEW_PBA8_UART0_BASE),
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.length = SZ_4K,
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.type = MT_DEVICE,
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},
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#endif
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};
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static void __init realview_pba8_map_io(void)
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{
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iotable_init(realview_pba8_io_desc, ARRAY_SIZE(realview_pba8_io_desc));
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}
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/*
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* RealView PBA8Core AMBA devices
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*/
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#define GPIO2_IRQ { IRQ_PBA8_GPIO2, NO_IRQ }
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#define GPIO2_DMA { 0, 0 }
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#define GPIO3_IRQ { IRQ_PBA8_GPIO3, NO_IRQ }
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#define GPIO3_DMA { 0, 0 }
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#define AACI_IRQ { IRQ_PBA8_AACI, NO_IRQ }
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#define AACI_DMA { 0x80, 0x81 }
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#define MMCI0_IRQ { IRQ_PBA8_MMCI0A, IRQ_PBA8_MMCI0B }
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#define MMCI0_DMA { 0x84, 0 }
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#define KMI0_IRQ { IRQ_PBA8_KMI0, NO_IRQ }
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#define KMI0_DMA { 0, 0 }
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#define KMI1_IRQ { IRQ_PBA8_KMI1, NO_IRQ }
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#define KMI1_DMA { 0, 0 }
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#define PBA8_SMC_IRQ { NO_IRQ, NO_IRQ }
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#define PBA8_SMC_DMA { 0, 0 }
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#define MPMC_IRQ { NO_IRQ, NO_IRQ }
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#define MPMC_DMA { 0, 0 }
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#define PBA8_CLCD_IRQ { IRQ_PBA8_CLCD, NO_IRQ }
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#define PBA8_CLCD_DMA { 0, 0 }
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#define DMAC_IRQ { IRQ_PBA8_DMAC, NO_IRQ }
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#define DMAC_DMA { 0, 0 }
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#define SCTL_IRQ { NO_IRQ, NO_IRQ }
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#define SCTL_DMA { 0, 0 }
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#define PBA8_WATCHDOG_IRQ { IRQ_PBA8_WATCHDOG, NO_IRQ }
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#define PBA8_WATCHDOG_DMA { 0, 0 }
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#define PBA8_GPIO0_IRQ { IRQ_PBA8_GPIO0, NO_IRQ }
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#define PBA8_GPIO0_DMA { 0, 0 }
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#define GPIO1_IRQ { IRQ_PBA8_GPIO1, NO_IRQ }
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#define GPIO1_DMA { 0, 0 }
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#define PBA8_RTC_IRQ { IRQ_PBA8_RTC, NO_IRQ }
|
||||
#define PBA8_RTC_DMA { 0, 0 }
|
||||
#define SCI_IRQ { IRQ_PBA8_SCI, NO_IRQ }
|
||||
#define SCI_DMA { 7, 6 }
|
||||
#define PBA8_UART0_IRQ { IRQ_PBA8_UART0, NO_IRQ }
|
||||
#define PBA8_UART0_DMA { 15, 14 }
|
||||
#define PBA8_UART1_IRQ { IRQ_PBA8_UART1, NO_IRQ }
|
||||
#define PBA8_UART1_DMA { 13, 12 }
|
||||
#define PBA8_UART2_IRQ { IRQ_PBA8_UART2, NO_IRQ }
|
||||
#define PBA8_UART2_DMA { 11, 10 }
|
||||
#define PBA8_UART3_IRQ { IRQ_PBA8_UART3, NO_IRQ }
|
||||
#define PBA8_UART3_DMA { 0x86, 0x87 }
|
||||
#define PBA8_SSP_IRQ { IRQ_PBA8_SSP, NO_IRQ }
|
||||
#define PBA8_SSP_DMA { 9, 8 }
|
||||
|
||||
/* FPGA Primecells */
|
||||
AMBA_DEVICE(aaci, "fpga:04", AACI, NULL);
|
||||
AMBA_DEVICE(mmc0, "fpga:05", MMCI0, &realview_mmc0_plat_data);
|
||||
AMBA_DEVICE(kmi0, "fpga:06", KMI0, NULL);
|
||||
AMBA_DEVICE(kmi1, "fpga:07", KMI1, NULL);
|
||||
AMBA_DEVICE(uart3, "fpga:09", PBA8_UART3, NULL);
|
||||
|
||||
/* DevChip Primecells */
|
||||
AMBA_DEVICE(smc, "dev:00", PBA8_SMC, NULL);
|
||||
AMBA_DEVICE(sctl, "dev:e0", SCTL, NULL);
|
||||
AMBA_DEVICE(wdog, "dev:e1", PBA8_WATCHDOG, NULL);
|
||||
AMBA_DEVICE(gpio0, "dev:e4", PBA8_GPIO0, NULL);
|
||||
AMBA_DEVICE(gpio1, "dev:e5", GPIO1, NULL);
|
||||
AMBA_DEVICE(gpio2, "dev:e6", GPIO2, NULL);
|
||||
AMBA_DEVICE(rtc, "dev:e8", PBA8_RTC, NULL);
|
||||
AMBA_DEVICE(sci0, "dev:f0", SCI, NULL);
|
||||
AMBA_DEVICE(uart0, "dev:f1", PBA8_UART0, NULL);
|
||||
AMBA_DEVICE(uart1, "dev:f2", PBA8_UART1, NULL);
|
||||
AMBA_DEVICE(uart2, "dev:f3", PBA8_UART2, NULL);
|
||||
AMBA_DEVICE(ssp0, "dev:f4", PBA8_SSP, NULL);
|
||||
|
||||
/* Primecells on the NEC ISSP chip */
|
||||
AMBA_DEVICE(clcd, "issp:20", PBA8_CLCD, &clcd_plat_data);
|
||||
AMBA_DEVICE(dmac, "issp:30", DMAC, NULL);
|
||||
|
||||
static struct amba_device *amba_devs[] __initdata = {
|
||||
&dmac_device,
|
||||
&uart0_device,
|
||||
&uart1_device,
|
||||
&uart2_device,
|
||||
&uart3_device,
|
||||
&smc_device,
|
||||
&clcd_device,
|
||||
&sctl_device,
|
||||
&wdog_device,
|
||||
&gpio0_device,
|
||||
&gpio1_device,
|
||||
&gpio2_device,
|
||||
&rtc_device,
|
||||
&sci0_device,
|
||||
&ssp0_device,
|
||||
&aaci_device,
|
||||
&mmc0_device,
|
||||
&kmi0_device,
|
||||
&kmi1_device,
|
||||
};
|
||||
|
||||
/*
|
||||
* RealView PB-A8 platform devices
|
||||
*/
|
||||
static struct resource realview_pba8_flash_resource[] = {
|
||||
[0] = {
|
||||
.start = REALVIEW_PBA8_FLASH0_BASE,
|
||||
.end = REALVIEW_PBA8_FLASH0_BASE + REALVIEW_PBA8_FLASH0_SIZE - 1,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = REALVIEW_PBA8_FLASH1_BASE,
|
||||
.end = REALVIEW_PBA8_FLASH1_BASE + REALVIEW_PBA8_FLASH1_SIZE - 1,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
};
|
||||
|
||||
static struct resource realview_pba8_smsc911x_resources[] = {
|
||||
[0] = {
|
||||
.start = REALVIEW_PBA8_ETH_BASE,
|
||||
.end = REALVIEW_PBA8_ETH_BASE + SZ_64K - 1,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = IRQ_PBA8_ETH,
|
||||
.end = IRQ_PBA8_ETH,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
||||
static struct platform_device realview_pba8_smsc911x_device = {
|
||||
.name = "smc911x",
|
||||
.id = 0,
|
||||
.num_resources = ARRAY_SIZE(realview_pba8_smsc911x_resources),
|
||||
.resource = realview_pba8_smsc911x_resources,
|
||||
};
|
||||
|
||||
struct resource realview_pba8_cf_resources[] = {
|
||||
[0] = {
|
||||
.start = REALVIEW_PBA8_CF_BASE,
|
||||
.end = REALVIEW_PBA8_CF_BASE + SZ_4K - 1,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = REALVIEW_PBA8_CF_MEM_BASE,
|
||||
.end = REALVIEW_PBA8_CF_MEM_BASE + SZ_4K - 1,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[2] = {
|
||||
.start = -1, /* FIXME: Find correct irq */
|
||||
.end = -1,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
||||
struct platform_device realview_pba8_cf_device = {
|
||||
.name = "compactflash",
|
||||
.id = 0,
|
||||
.num_resources = ARRAY_SIZE(realview_pba8_cf_resources),
|
||||
.resource = realview_pba8_cf_resources,
|
||||
};
|
||||
|
||||
static void __init gic_init_irq(void)
|
||||
{
|
||||
/* ARM PB-A8 on-board GIC */
|
||||
gic_cpu_base_addr = __io_address(REALVIEW_PBA8_GIC_CPU_BASE);
|
||||
gic_dist_init(0, __io_address(REALVIEW_PBA8_GIC_DIST_BASE), IRQ_PBA8_GIC_START);
|
||||
gic_cpu_init(0, __io_address(REALVIEW_PBA8_GIC_CPU_BASE));
|
||||
}
|
||||
|
||||
static void __init realview_pba8_timer_init(void)
|
||||
{
|
||||
timer0_va_base = __io_address(REALVIEW_PBA8_TIMER0_1_BASE);
|
||||
timer1_va_base = __io_address(REALVIEW_PBA8_TIMER0_1_BASE) + 0x20;
|
||||
timer2_va_base = __io_address(REALVIEW_PBA8_TIMER2_3_BASE);
|
||||
timer3_va_base = __io_address(REALVIEW_PBA8_TIMER2_3_BASE) + 0x20;
|
||||
|
||||
realview_timer_init(IRQ_PBA8_TIMER0_1);
|
||||
}
|
||||
|
||||
static struct sys_timer realview_pba8_timer = {
|
||||
.init = realview_pba8_timer_init,
|
||||
};
|
||||
|
||||
static void __init realview_pba8_init(void)
|
||||
{
|
||||
int i;
|
||||
|
||||
realview_flash_register(realview_pba8_flash_resource,
|
||||
ARRAY_SIZE(realview_pba8_flash_resource));
|
||||
platform_device_register(&realview_pba8_smsc911x_device);
|
||||
platform_device_register(&realview_i2c_device);
|
||||
platform_device_register(&realview_pba8_cf_device);
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
|
||||
struct amba_device *d = amba_devs[i];
|
||||
amba_device_register(d, &iomem_resource);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_LEDS
|
||||
leds_event = realview_leds_event;
|
||||
#endif
|
||||
}
|
||||
|
||||
MACHINE_START(REALVIEW_PBA8, "ARM-RealView PB-A8")
|
||||
/* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
|
||||
.phys_io = REALVIEW_PBA8_UART0_BASE,
|
||||
.io_pg_offst = (IO_ADDRESS(REALVIEW_PBA8_UART0_BASE) >> 18) & 0xfffc,
|
||||
.boot_params = PHYS_OFFSET + 0x00000100,
|
||||
.map_io = realview_pba8_map_io,
|
||||
.init_irq = gic_init_irq,
|
||||
.timer = &realview_pba8_timer,
|
||||
.init_machine = realview_pba8_init,
|
||||
MACHINE_END
|
||||
Loading…
Reference in New Issue
Block a user