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arm64: dts: qcom: sdm845: Add Q6V5 MSS node
This patch adds Q6V5 MSS remoteproc node for SDM845 SoCs. Reviewed-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Sibi Sankar <sibis@codeaurora.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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@ -1747,6 +1747,64 @@ pinmux {
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};
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};
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};
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};
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mss_pil: remoteproc@4080000 {
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compatible = "qcom,sdm845-mss-pil";
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reg = <0 0x04080000 0 0x408>, <0 0x04180000 0 0x48>;
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reg-names = "qdsp6", "rmb";
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interrupts-extended =
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<&intc GIC_SPI 266 IRQ_TYPE_EDGE_RISING>,
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<&modem_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
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<&modem_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
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<&modem_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,
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<&modem_smp2p_in 3 IRQ_TYPE_EDGE_RISING>,
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<&modem_smp2p_in 7 IRQ_TYPE_EDGE_RISING>;
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interrupt-names = "wdog", "fatal", "ready",
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"handover", "stop-ack",
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"shutdown-ack";
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clocks = <&gcc GCC_MSS_CFG_AHB_CLK>,
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<&gcc GCC_MSS_Q6_MEMNOC_AXI_CLK>,
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<&gcc GCC_BOOT_ROM_AHB_CLK>,
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<&gcc GCC_MSS_GPLL0_DIV_CLK_SRC>,
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<&gcc GCC_MSS_SNOC_AXI_CLK>,
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<&gcc GCC_MSS_MFAB_AXIS_CLK>,
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<&gcc GCC_PRNG_AHB_CLK>,
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<&rpmhcc RPMH_CXO_CLK>;
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clock-names = "iface", "bus", "mem", "gpll0_mss",
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"snoc_axi", "mnoc_axi", "prng", "xo";
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qcom,smem-states = <&modem_smp2p_out 0>;
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qcom,smem-state-names = "stop";
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resets = <&aoss_reset AOSS_CC_MSS_RESTART>,
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<&pdc_reset PDC_MODEM_SYNC_RESET>;
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reset-names = "mss_restart", "pdc_reset";
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qcom,halt-regs = <&tcsr_mutex_regs 0x23000 0x25000 0x24000>;
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power-domains = <&aoss_qmp 2>,
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<&rpmhpd SDM845_CX>,
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<&rpmhpd SDM845_MX>,
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<&rpmhpd SDM845_MSS>;
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power-domain-names = "load_state", "cx", "mx", "mss";
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mba {
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memory-region = <&mba_region>;
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};
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mpss {
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memory-region = <&mpss_region>;
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};
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glink-edge {
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interrupts = <GIC_SPI 449 IRQ_TYPE_EDGE_RISING>;
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label = "modem";
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qcom,remote-pid = <1>;
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mboxes = <&apss_shared 12>;
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};
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};
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gpucc: clock-controller@5090000 {
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gpucc: clock-controller@5090000 {
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compatible = "qcom,sdm845-gpucc";
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compatible = "qcom,sdm845-gpucc";
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reg = <0 0x05090000 0 0x9000>;
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reg = <0 0x05090000 0 0x9000>;
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