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ARM: dts: imx7: add GPMI NAND and APBH DMA
Add i.MX 7 APBH DMA and GPMI NAND modules. Signed-off-by: Stefan Agner <stefan@agner.ch> Tested-by: Fabio Estevam <fabio.estevam@nxp.com> Acked-by: Han Xu <han.xu@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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@ -1022,5 +1022,36 @@ fec1: ethernet@30be0000 {
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status = "disabled";
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};
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};
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dma_apbh: dma-apbh@33000000 {
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compatible = "fsl,imx7d-dma-apbh", "fsl,imx28-dma-apbh";
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reg = <0x33000000 0x2000>;
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interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "gpmi0", "gpmi1", "gpmi2", "gpmi3";
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#dma-cells = <1>;
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dma-channels = <4>;
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clocks = <&clks IMX7D_NAND_USDHC_BUS_RAWNAND_CLK>;
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};
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gpmi: gpmi-nand@33002000{
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compatible = "fsl,imx7d-gpmi-nand";
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0x33002000 0x2000>, <0x33004000 0x4000>;
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reg-names = "gpmi-nand", "bch";
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interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "bch";
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clocks = <&clks IMX7D_NAND_RAWNAND_CLK>,
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<&clks IMX7D_NAND_USDHC_BUS_RAWNAND_CLK>;
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clock-names = "gpmi_io", "gpmi_bch_apb";
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dmas = <&dma_apbh 0>;
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dma-names = "rx-tx";
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status = "disabled";
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assigned-clocks = <&clks IMX7D_NAND_ROOT_SRC>;
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assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_500M_CLK>;
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};
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};
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};
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