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arm64: dts: uniphier: Add missing clock-names and reset-names to pcie-phy

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This adds missing clock-names and reset-names to pcie-phy node according to
Documentation/devicetree/bindings/phy/socionext,uniphier-pcie.yaml.

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
This commit is contained in:
Kunihiko Hayashi 2020-07-08 17:56:18 +09:00 committed by Masahiro Yamada
parent dcd54fa89c
commit e6bd81a229
2 changed files with 4 additions and 0 deletions
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2
arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
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@ -936,7 +936,9 @@ pcie_phy: phy@66038000 {
compatible = "socionext,uniphier-ld20-pcie-phy"; compatible = "socionext,uniphier-ld20-pcie-phy";
reg = <0x66038000 0x4000>; reg = <0x66038000 0x4000>;
#phy-cells = <0>; #phy-cells = <0>;
clock-names = "link";
clocks = <&sys_clk 24>; clocks = <&sys_clk 24>;
reset-names = "link";
resets = <&sys_rst 24>; resets = <&sys_rst 24>;
socionext,syscon = <&soc_glue>; socionext,syscon = <&soc_glue>;
}; };

2
arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi
View File

@ -833,7 +833,9 @@ pcie_phy: phy@66038000 {
compatible = "socionext,uniphier-pxs3-pcie-phy"; compatible = "socionext,uniphier-pxs3-pcie-phy";
reg = <0x66038000 0x4000>; reg = <0x66038000 0x4000>;
#phy-cells = <0>; #phy-cells = <0>;
clock-names = "link";
clocks = <&sys_clk 24>; clocks = <&sys_clk 24>;
reset-names = "link";
resets = <&sys_rst 24>; resets = <&sys_rst 24>;
socionext,syscon = <&soc_glue>; socionext,syscon = <&soc_glue>;
}; };