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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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powerpc fixes for 4.5 #2
- Fix build error on 32-bit with checkpoint restart from Aneesh Kumar - Fix dedotify for binutils >= 2.26 from Andreas Schwab - Don't trace hcalls on offline CPUs from Denis Kirjanov - eeh: Fix stale cached primary bus from Gavin Shan - eeh: Fix stale PE primary bus from Gavin Shan - mm: Fix Multi hit ERAT cause by recent THP update from Aneesh Kumar K.V - ioda: Set "read" permission when "write" is set from Alexey Kardashevskiy -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJWx8l5AAoJEFHr6jzI4aWAeY0P/AomeQCRieoBMKJi36WX4+gU Cm1iBgM593VEM/KFsYtedm5+4QaCmPE+1tVm4/u0wbLeEQ8TqNLSZLniB9USE0hb 9655gGQyFE95BZa8WfbqHOI7+BK+TkUOWGY0CfyqPVrknzSN2MCDHjUaNo1wge6l zmIYIkKhaQAinFSFovOdjQ63rYdk6CxsfgbP1Gl2aX0cmzWW1n07AvZLqNmLFJ+4 L3uBXPcrEKY/nfkRi+FutoTb86ggt9J9dqCfJHHfWKn60qwhpKwiva84k3jI/BOu yBTFeNzlobXt0ceDSWx1ITXzKmJQokWGC5+Lo+0mDb4veAbhLgHlXdx7NUcZIB6+ YGYGSOkeKCnbnInIOGLz45LlevJFviI94y0YY4tt++Csq/IjnBhDeTkGx7zcqRLG v5hl7AhykHd3Me5iRuyRRVoVyk6+318OZW450Oxxj7EtkzpSeLfHCMKxk5w1Nxuk tenWQeApdkTVr91m5VJNFOsrmtFDLJv51C8duiUFWzc195ejSMYDR86K+qBeaebs 39obXHVYRnCrn9TzODIR9SnEd7dHImekQ4a3G3F54mLJ4qqUN089TDqBGY2GNuT8 j8QVBttp3SWuZSvtvDJLxoFt2QTKxcuiMQ4FX/OAS4qWRjSR8v2WTCyBZt68l7er kpUnIelJSuIDVLdNuFlf =7Yzi -----END PGP SIGNATURE----- Merge tag 'powerpc-4.5-3' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux Pull powerpc fixes from Michael Ellerman: - Fix build error on 32-bit with checkpoint restart from Aneesh Kumar - Fix dedotify for binutils >= 2.26 from Andreas Schwab - Don't trace hcalls on offline CPUs from Denis Kirjanov - eeh: Fix stale cached primary bus from Gavin Shan - eeh: Fix stale PE primary bus from Gavin Shan - mm: Fix Multi hit ERAT cause by recent THP update from Aneesh Kumar K.V - ioda: Set "read" permission when "write" is set from Alexey Kardashevskiy * tag 'powerpc-4.5-3' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux: powerpc/ioda: Set "read" permission when "write" is set powerpc/mm: Fix Multi hit ERAT cause by recent THP update powerpc/powernv: Fix stale PE primary bus powerpc/eeh: Fix stale cached primary bus powerpc/pseries: Don't trace hcalls on offline CPUs powerpc: Fix dedotify for binutils >= 2.26 powerpc/book3s_32: Fix build error with checkpoint restart
This commit is contained in:
commit
e6a1c1e9dd
@ -557,7 +557,7 @@ choice
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config PPC_4K_PAGES
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bool "4k page size"
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select HAVE_ARCH_SOFT_DIRTY if CHECKPOINT_RESTORE && PPC_BOOK3S
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select HAVE_ARCH_SOFT_DIRTY if PPC_BOOK3S_64
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config PPC_16K_PAGES
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bool "16k page size"
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@ -566,7 +566,7 @@ config PPC_16K_PAGES
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config PPC_64K_PAGES
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bool "64k page size"
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depends on !PPC_FSL_BOOK3E && (44x || PPC_STD_MMU_64 || PPC_BOOK3E_64)
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select HAVE_ARCH_SOFT_DIRTY if CHECKPOINT_RESTORE && PPC_BOOK3S
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select HAVE_ARCH_SOFT_DIRTY if PPC_BOOK3S_64
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config PPC_256K_PAGES
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bool "256k page size"
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@ -281,6 +281,10 @@ extern pgtable_t pgtable_trans_huge_withdraw(struct mm_struct *mm, pmd_t *pmdp);
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extern void pmdp_invalidate(struct vm_area_struct *vma, unsigned long address,
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pmd_t *pmdp);
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#define __HAVE_ARCH_PMDP_HUGE_SPLIT_PREPARE
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extern void pmdp_huge_split_prepare(struct vm_area_struct *vma,
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unsigned long address, pmd_t *pmdp);
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#define pmd_move_must_withdraw pmd_move_must_withdraw
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struct spinlock;
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static inline int pmd_move_must_withdraw(struct spinlock *new_pmd_ptl,
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@ -81,6 +81,7 @@ struct pci_dn;
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#define EEH_PE_KEEP (1 << 8) /* Keep PE on hotplug */
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#define EEH_PE_CFG_RESTRICTED (1 << 9) /* Block config on error */
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#define EEH_PE_REMOVED (1 << 10) /* Removed permanently */
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#define EEH_PE_PRI_BUS (1 << 11) /* Cached primary bus */
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struct eeh_pe {
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int type; /* PE type: PHB/Bus/Device */
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@ -57,12 +57,14 @@ DEFINE_EVENT(ppc64_interrupt_class, timer_interrupt_exit,
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extern void hcall_tracepoint_regfunc(void);
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extern void hcall_tracepoint_unregfunc(void);
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TRACE_EVENT_FN(hcall_entry,
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TRACE_EVENT_FN_COND(hcall_entry,
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TP_PROTO(unsigned long opcode, unsigned long *args),
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TP_ARGS(opcode, args),
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TP_CONDITION(cpu_online(raw_smp_processor_id())),
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TP_STRUCT__entry(
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__field(unsigned long, opcode)
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),
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@ -76,13 +78,15 @@ TRACE_EVENT_FN(hcall_entry,
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hcall_tracepoint_regfunc, hcall_tracepoint_unregfunc
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);
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TRACE_EVENT_FN(hcall_exit,
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TRACE_EVENT_FN_COND(hcall_exit,
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TP_PROTO(unsigned long opcode, unsigned long retval,
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unsigned long *retbuf),
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TP_ARGS(opcode, retval, retbuf),
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TP_CONDITION(cpu_online(raw_smp_processor_id())),
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TP_STRUCT__entry(
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__field(unsigned long, opcode)
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__field(unsigned long, retval)
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@ -564,6 +564,7 @@ static int eeh_reset_device(struct eeh_pe *pe, struct pci_bus *bus)
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*/
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eeh_pe_state_mark(pe, EEH_PE_KEEP);
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if (bus) {
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eeh_pe_state_clear(pe, EEH_PE_PRI_BUS);
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pci_lock_rescan_remove();
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pcibios_remove_pci_devices(bus);
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pci_unlock_rescan_remove();
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@ -803,6 +804,7 @@ static void eeh_handle_normal_event(struct eeh_pe *pe)
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* the their PCI config any more.
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*/
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if (frozen_bus) {
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eeh_pe_state_clear(pe, EEH_PE_PRI_BUS);
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eeh_pe_dev_mode_mark(pe, EEH_DEV_REMOVED);
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pci_lock_rescan_remove();
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@ -886,6 +888,7 @@ static void eeh_handle_special_event(void)
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continue;
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/* Notify all devices to be down */
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eeh_pe_state_clear(pe, EEH_PE_PRI_BUS);
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bus = eeh_pe_bus_get(phb_pe);
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eeh_pe_dev_traverse(pe,
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eeh_report_failure, NULL);
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@ -928,7 +928,7 @@ struct pci_bus *eeh_pe_bus_get(struct eeh_pe *pe)
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bus = pe->phb->bus;
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} else if (pe->type & EEH_PE_BUS ||
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pe->type & EEH_PE_DEVICE) {
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if (pe->bus) {
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if (pe->state & EEH_PE_PRI_BUS) {
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bus = pe->bus;
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goto out;
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}
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@ -340,7 +340,7 @@ static void dedotify(Elf64_Sym *syms, unsigned int numsyms, char *strtab)
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if (name[0] == '.') {
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if (strcmp(name+1, "TOC.") == 0)
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syms[i].st_shndx = SHN_ABS;
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memmove(name, name+1, strlen(name));
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syms[i].st_name++;
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}
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}
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}
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@ -646,6 +646,28 @@ pgtable_t pgtable_trans_huge_withdraw(struct mm_struct *mm, pmd_t *pmdp)
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return pgtable;
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}
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void pmdp_huge_split_prepare(struct vm_area_struct *vma,
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unsigned long address, pmd_t *pmdp)
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{
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VM_BUG_ON(address & ~HPAGE_PMD_MASK);
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VM_BUG_ON(REGION_ID(address) != USER_REGION_ID);
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/*
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* We can't mark the pmd none here, because that will cause a race
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* against exit_mmap. We need to continue mark pmd TRANS HUGE, while
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* we spilt, but at the same time we wan't rest of the ppc64 code
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* not to insert hash pte on this, because we will be modifying
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* the deposited pgtable in the caller of this function. Hence
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* clear the _PAGE_USER so that we move the fault handling to
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* higher level function and that will serialize against ptl.
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* We need to flush existing hash pte entries here even though,
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* the translation is still valid, because we will withdraw
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* pgtable_t after this.
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*/
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pmd_hugepage_update(vma->vm_mm, address, pmdp, _PAGE_USER, 0);
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}
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/*
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* set a new huge pmd. We should not be called for updating
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* an existing pmd entry. That should go via pmd_hugepage_update.
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@ -663,10 +685,20 @@ void set_pmd_at(struct mm_struct *mm, unsigned long addr,
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return set_pte_at(mm, addr, pmdp_ptep(pmdp), pmd_pte(pmd));
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}
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/*
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* We use this to invalidate a pmdp entry before switching from a
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* hugepte to regular pmd entry.
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*/
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void pmdp_invalidate(struct vm_area_struct *vma, unsigned long address,
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pmd_t *pmdp)
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{
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pmd_hugepage_update(vma->vm_mm, address, pmdp, _PAGE_PRESENT, 0);
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/*
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* This ensures that generic code that rely on IRQ disabling
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* to prevent a parallel THP split work as expected.
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*/
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kick_all_cpus_sync();
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}
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/*
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@ -444,9 +444,12 @@ static void *pnv_eeh_probe(struct pci_dn *pdn, void *data)
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* PCI devices of the PE are expected to be removed prior
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* to PE reset.
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*/
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if (!edev->pe->bus)
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if (!(edev->pe->state & EEH_PE_PRI_BUS)) {
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edev->pe->bus = pci_find_bus(hose->global_number,
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pdn->busno);
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if (edev->pe->bus)
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edev->pe->state |= EEH_PE_PRI_BUS;
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}
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/*
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* Enable EEH explicitly so that we will do EEH check
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@ -3180,6 +3180,7 @@ static void pnv_pci_ioda_shutdown(struct pci_controller *hose)
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static const struct pci_controller_ops pnv_pci_ioda_controller_ops = {
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.dma_dev_setup = pnv_pci_dma_dev_setup,
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.dma_bus_setup = pnv_pci_dma_bus_setup,
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#ifdef CONFIG_PCI_MSI
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.setup_msi_irqs = pnv_setup_msi_irqs,
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.teardown_msi_irqs = pnv_teardown_msi_irqs,
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@ -599,6 +599,9 @@ int pnv_tce_build(struct iommu_table *tbl, long index, long npages,
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u64 rpn = __pa(uaddr) >> tbl->it_page_shift;
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long i;
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if (proto_tce & TCE_PCI_WRITE)
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proto_tce |= TCE_PCI_READ;
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for (i = 0; i < npages; i++) {
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unsigned long newtce = proto_tce |
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((rpn + i) << tbl->it_page_shift);
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@ -620,6 +623,9 @@ int pnv_tce_xchg(struct iommu_table *tbl, long index,
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BUG_ON(*hpa & ~IOMMU_PAGE_MASK(tbl));
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if (newtce & TCE_PCI_WRITE)
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newtce |= TCE_PCI_READ;
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oldtce = xchg(pnv_tce(tbl, idx), cpu_to_be64(newtce));
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*hpa = be64_to_cpu(oldtce) & ~(TCE_PCI_READ | TCE_PCI_WRITE);
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*direction = iommu_tce_direction(oldtce);
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@ -760,6 +766,26 @@ void pnv_pci_dma_dev_setup(struct pci_dev *pdev)
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phb->dma_dev_setup(phb, pdev);
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}
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void pnv_pci_dma_bus_setup(struct pci_bus *bus)
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{
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struct pci_controller *hose = bus->sysdata;
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struct pnv_phb *phb = hose->private_data;
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struct pnv_ioda_pe *pe;
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list_for_each_entry(pe, &phb->ioda.pe_list, list) {
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if (!(pe->flags & (PNV_IODA_PE_BUS | PNV_IODA_PE_BUS_ALL)))
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continue;
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if (!pe->pbus)
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continue;
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if (bus->number == ((pe->rid >> 8) & 0xFF)) {
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pe->pbus = bus;
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break;
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}
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}
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}
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void pnv_pci_shutdown(void)
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{
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struct pci_controller *hose;
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extern int pnv_eeh_phb_reset(struct pci_controller *hose, int option);
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extern void pnv_pci_dma_dev_setup(struct pci_dev *pdev);
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extern void pnv_pci_dma_bus_setup(struct pci_bus *bus);
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extern int pnv_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type);
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extern void pnv_teardown_msi_irqs(struct pci_dev *pdev);
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@ -239,6 +239,14 @@ extern void pmdp_invalidate(struct vm_area_struct *vma, unsigned long address,
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pmd_t *pmdp);
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#endif
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#ifndef __HAVE_ARCH_PMDP_HUGE_SPLIT_PREPARE
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static inline void pmdp_huge_split_prepare(struct vm_area_struct *vma,
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unsigned long address, pmd_t *pmdp)
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{
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}
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#endif
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#ifndef __HAVE_ARCH_PTE_SAME
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static inline int pte_same(pte_t pte_a, pte_t pte_b)
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{
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@ -2861,6 +2861,7 @@ static void __split_huge_pmd_locked(struct vm_area_struct *vma, pmd_t *pmd,
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young = pmd_young(*pmd);
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dirty = pmd_dirty(*pmd);
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pmdp_huge_split_prepare(vma, haddr, pmd);
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pgtable = pgtable_trans_huge_withdraw(mm, pmd);
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pmd_populate(mm, &_pmd, pgtable);
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