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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-02 14:36:46 +07:00
drm/radeon: add get_allowed_info_register for cayman/TN
Registers that can be fetched from the info ioctl. Tested-by: Marek Olšák <marek.olsak@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -828,6 +828,35 @@ int ni_init_microcode(struct radeon_device *rdev)
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return err;
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}
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/**
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* cayman_get_allowed_info_register - fetch the register for the info ioctl
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*
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* @rdev: radeon_device pointer
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* @reg: register offset in bytes
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* @val: register value
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*
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* Returns 0 for success or -EINVAL for an invalid register
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*
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*/
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int cayman_get_allowed_info_register(struct radeon_device *rdev,
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u32 reg, u32 *val)
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{
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switch (reg) {
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case GRBM_STATUS:
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case GRBM_STATUS_SE0:
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case GRBM_STATUS_SE1:
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case SRBM_STATUS:
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case SRBM_STATUS2:
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case (DMA_STATUS_REG + DMA0_REGISTER_OFFSET):
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case (DMA_STATUS_REG + DMA1_REGISTER_OFFSET):
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case UVD_STATUS:
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*val = RREG32(reg);
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return 0;
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default:
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return -EINVAL;
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}
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}
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int tn_get_temp(struct radeon_device *rdev)
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{
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u32 temp = RREG32_SMC(TN_CURRENT_GNB_TEMP) & 0x7ff;
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@ -1086,6 +1086,7 @@
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#define UVD_UDEC_DBW_ADDR_CONFIG 0xEF54
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#define UVD_RBC_RB_RPTR 0xF690
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#define UVD_RBC_RB_WPTR 0xF694
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#define UVD_STATUS 0xf6bc
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/*
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* PM4
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@ -1668,6 +1668,7 @@ static struct radeon_asic cayman_asic = {
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.mc_wait_for_idle = &evergreen_mc_wait_for_idle,
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.get_xclk = &rv770_get_xclk,
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.get_gpu_clock_counter = &r600_get_gpu_clock_counter,
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.get_allowed_info_register = cayman_get_allowed_info_register,
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.gart = {
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.tlb_flush = &cayman_pcie_gart_tlb_flush,
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.get_page_entry = &rs600_gart_get_page_entry,
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@ -1772,6 +1773,7 @@ static struct radeon_asic trinity_asic = {
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.mc_wait_for_idle = &evergreen_mc_wait_for_idle,
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.get_xclk = &r600_get_xclk,
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.get_gpu_clock_counter = &r600_get_gpu_clock_counter,
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.get_allowed_info_register = cayman_get_allowed_info_register,
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.gart = {
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.tlb_flush = &cayman_pcie_gart_tlb_flush,
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.get_page_entry = &rs600_gart_get_page_entry,
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@ -651,6 +651,8 @@ uint32_t cayman_dma_get_wptr(struct radeon_device *rdev,
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struct radeon_ring *ring);
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void cayman_dma_set_wptr(struct radeon_device *rdev,
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struct radeon_ring *ring);
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int cayman_get_allowed_info_register(struct radeon_device *rdev,
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u32 reg, u32 *val);
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int ni_dpm_init(struct radeon_device *rdev);
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void ni_dpm_setup_asic(struct radeon_device *rdev);
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