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drm/amd/display: Implement DePQ for DCN2

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[Why]
Need support for more color management in 10bit
surface.

[How]
Provide support for DePQ for 10bit surface

Signed-off-by: Reza Amini <Reza.Amini@amd.com>
Reviewed-by: Krunoslav Kovac <Krunoslav.Kovac@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Reza Amini 2019-11-15 17:39:12 -05:00 committed by Alex Deucher
parent 0beb54039d
commit e66164105d
2 changed files with 8 additions and 0 deletions
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3
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dpp_cm.c
View File

@ -149,6 +149,9 @@ void dpp2_set_degamma(
case IPP_DEGAMMA_MODE_HW_xvYCC:
REG_UPDATE(CM_DGAM_CONTROL, CM_DGAM_LUT_MODE, 2);
break;
case IPP_DEGAMMA_MODE_USER_PWL:
REG_UPDATE(CM_DGAM_CONTROL, CM_DGAM_LUT_MODE, 3);
break;
default:
BREAK_TO_DEBUGGER();
break;

5
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
View File

@ -878,6 +878,11 @@ bool dcn20_set_input_transfer_func(struct dc *dc,
IPP_DEGAMMA_MODE_BYPASS);
break;
case TRANSFER_FUNCTION_PQ:
dpp_base->funcs->dpp_set_degamma(dpp_base, IPP_DEGAMMA_MODE_USER_PWL);
cm_helper_translate_curve_to_degamma_hw_format(tf, &dpp_base->degamma_params);
dpp_base->funcs->dpp_program_degamma_pwl(dpp_base, &dpp_base->degamma_params);
result = true;
break;
default:
result = false;
break;