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drm/amd/display: whitespace cleanup in amdgpu_dm_irq.c/h

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To match kernel standards.  No intended functional change.

Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Alex Deucher 2017-10-11 09:53:16 -04:00 committed by Dave Airlie
parent 6563617fbb
commit e637525659
2 changed files with 64 additions and 85 deletions
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111
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c
View File

@ -66,11 +66,10 @@ struct amdgpu_dm_timer_handler_data {
* Private functions. * Private functions.
*****************************************************************************/ *****************************************************************************/
static void init_handler_common_data( static void init_handler_common_data(struct handler_common_data *hcd,
struct handler_common_data *hcd, void (*ih)(void *),
void (*ih)(void *), void *args,
void *args, struct amdgpu_display_manager *dm)
struct amdgpu_display_manager *dm)
{ {
hcd->handler = ih; hcd->handler = ih;
hcd->handler_arg = args; hcd->handler_arg = args;
@ -115,10 +114,9 @@ static void dm_irq_work_func(struct work_struct *work)
* Remove a handler and return a pointer to hander list from which the * Remove a handler and return a pointer to hander list from which the
* handler was removed. * handler was removed.
*/ */
static struct list_head *remove_irq_handler( static struct list_head *remove_irq_handler(struct amdgpu_device *adev,
struct amdgpu_device *adev, void *ih,
void *ih, const struct dc_interrupt_params *int_params)
const struct dc_interrupt_params *int_params)
{ {
struct list_head *hnd_list; struct list_head *hnd_list;
struct list_head *entry, *tmp; struct list_head *entry, *tmp;
@ -172,9 +170,8 @@ static struct list_head *remove_irq_handler(
} }
/* If 'handler_in == NULL' then remove ALL handlers. */ /* If 'handler_in == NULL' then remove ALL handlers. */
static void remove_timer_handler( static void remove_timer_handler(struct amdgpu_device *adev,
struct amdgpu_device *adev, struct amdgpu_dm_timer_handler_data *handler_in)
struct amdgpu_dm_timer_handler_data *handler_in)
{ {
struct amdgpu_dm_timer_handler_data *handler_temp; struct amdgpu_dm_timer_handler_data *handler_temp;
struct list_head *handler_list; struct list_head *handler_list;
@ -236,8 +233,7 @@ static void remove_timer_handler(
* *
* @work: work struct * @work: work struct
*/ */
static void dm_timer_work_func( static void dm_timer_work_func(struct work_struct *work)
struct work_struct *work)
{ {
struct amdgpu_dm_timer_handler_data *handler_data = struct amdgpu_dm_timer_handler_data *handler_data =
container_of(work, struct amdgpu_dm_timer_handler_data, container_of(work, struct amdgpu_dm_timer_handler_data,
@ -253,9 +249,9 @@ static void dm_timer_work_func(
remove_timer_handler(handler_data->hcd.dm->adev, handler_data); remove_timer_handler(handler_data->hcd.dm->adev, handler_data);
} }
static bool validate_irq_registration_params( static bool
struct dc_interrupt_params *int_params, validate_irq_registration_params(struct dc_interrupt_params *int_params,
void (*ih)(void *)) void (*ih)(void *))
{ {
if (NULL == int_params || NULL == ih) { if (NULL == int_params || NULL == ih) {
DRM_ERROR("DM_IRQ: invalid input!\n"); DRM_ERROR("DM_IRQ: invalid input!\n");
@ -277,9 +273,8 @@ static bool validate_irq_registration_params(
return true; return true;
} }
static bool validate_irq_unregistration_params( static bool validate_irq_unregistration_params(enum dc_irq_source irq_source,
enum dc_irq_source irq_source, irq_handler_idx handler_idx)
irq_handler_idx handler_idx)
{ {
if (DAL_INVALID_IRQ_HANDLER_IDX == handler_idx) { if (DAL_INVALID_IRQ_HANDLER_IDX == handler_idx) {
DRM_ERROR("DM_IRQ: invalid handler_idx==NULL!\n"); DRM_ERROR("DM_IRQ: invalid handler_idx==NULL!\n");
@ -299,11 +294,10 @@ static bool validate_irq_unregistration_params(
* Note: caller is responsible for input validation. * Note: caller is responsible for input validation.
*****************************************************************************/ *****************************************************************************/
void *amdgpu_dm_irq_register_interrupt( void *amdgpu_dm_irq_register_interrupt(struct amdgpu_device *adev,
struct amdgpu_device *adev, struct dc_interrupt_params *int_params,
struct dc_interrupt_params *int_params, void (*ih)(void *),
void (*ih)(void *), void *handler_args)
void *handler_args)
{ {
struct list_head *hnd_list; struct list_head *hnd_list;
struct amdgpu_dm_irq_handler_data *handler_data; struct amdgpu_dm_irq_handler_data *handler_data;
@ -359,10 +353,9 @@ void *amdgpu_dm_irq_register_interrupt(
return handler_data; return handler_data;
} }
void amdgpu_dm_irq_unregister_interrupt( void amdgpu_dm_irq_unregister_interrupt(struct amdgpu_device *adev,
struct amdgpu_device *adev, enum dc_irq_source irq_source,
enum dc_irq_source irq_source, void *ih)
void *ih)
{ {
struct list_head *handler_list; struct list_head *handler_list;
struct dc_interrupt_params int_params; struct dc_interrupt_params int_params;
@ -394,8 +387,7 @@ void amdgpu_dm_irq_unregister_interrupt(
} }
} }
int amdgpu_dm_irq_init( int amdgpu_dm_irq_init(struct amdgpu_device *adev)
struct amdgpu_device *adev)
{ {
int src; int src;
struct irq_list_head *lh; struct irq_list_head *lh;
@ -427,11 +419,10 @@ int amdgpu_dm_irq_init(
return 0; return 0;
} }
void amdgpu_dm_irq_register_timer( void amdgpu_dm_irq_register_timer(struct amdgpu_device *adev,
struct amdgpu_device *adev, struct dc_timer_interrupt_params *int_params,
struct dc_timer_interrupt_params *int_params, interrupt_handler ih,
interrupt_handler ih, void *args)
void *args)
{ {
unsigned long jf_delay; unsigned long jf_delay;
struct list_head *handler_list; struct list_head *handler_list;
@ -470,8 +461,7 @@ void amdgpu_dm_irq_register_timer(
} }
/* DM IRQ and timer resource release */ /* DM IRQ and timer resource release */
void amdgpu_dm_irq_fini( void amdgpu_dm_irq_fini(struct amdgpu_device *adev)
struct amdgpu_device *adev)
{ {
int src; int src;
struct irq_list_head *lh; struct irq_list_head *lh;
@ -492,8 +482,7 @@ void amdgpu_dm_irq_fini(
destroy_workqueue(adev->dm.timer_workqueue); destroy_workqueue(adev->dm.timer_workqueue);
} }
int amdgpu_dm_irq_suspend( int amdgpu_dm_irq_suspend(struct amdgpu_device *adev)
struct amdgpu_device *adev)
{ {
int src; int src;
struct list_head *hnd_list_h; struct list_head *hnd_list_h;
@ -576,9 +565,8 @@ int amdgpu_dm_irq_resume_late(struct amdgpu_device *adev)
* amdgpu_dm_irq_schedule_work - schedule all work items registered for the * amdgpu_dm_irq_schedule_work - schedule all work items registered for the
* "irq_source". * "irq_source".
*/ */
static void amdgpu_dm_irq_schedule_work( static void amdgpu_dm_irq_schedule_work(struct amdgpu_device *adev,
struct amdgpu_device *adev, enum dc_irq_source irq_source)
enum dc_irq_source irq_source)
{ {
unsigned long irq_table_flags; unsigned long irq_table_flags;
struct work_struct *work = NULL; struct work_struct *work = NULL;
@ -601,9 +589,8 @@ static void amdgpu_dm_irq_schedule_work(
/** amdgpu_dm_irq_immediate_work /** amdgpu_dm_irq_immediate_work
* Callback high irq work immediately, don't send to work queue * Callback high irq work immediately, don't send to work queue
*/ */
static void amdgpu_dm_irq_immediate_work( static void amdgpu_dm_irq_immediate_work(struct amdgpu_device *adev,
struct amdgpu_device *adev, enum dc_irq_source irq_source)
enum dc_irq_source irq_source)
{ {
struct amdgpu_dm_irq_handler_data *handler_data; struct amdgpu_dm_irq_handler_data *handler_data;
struct list_head *entry; struct list_head *entry;
@ -635,10 +622,9 @@ static void amdgpu_dm_irq_immediate_work(
* Generic IRQ handler, calls all registered high irq work immediately, and * Generic IRQ handler, calls all registered high irq work immediately, and
* schedules work for low irq * schedules work for low irq
*/ */
int amdgpu_dm_irq_handler( int amdgpu_dm_irq_handler(struct amdgpu_device *adev,
struct amdgpu_device *adev, struct amdgpu_irq_src *source,
struct amdgpu_irq_src *source, struct amdgpu_iv_entry *entry)
struct amdgpu_iv_entry *entry)
{ {
enum dc_irq_source src = enum dc_irq_source src =
@ -678,9 +664,9 @@ static enum dc_irq_source amdgpu_dm_hpd_to_dal_irq_source(unsigned type)
} }
static int amdgpu_dm_set_hpd_irq_state(struct amdgpu_device *adev, static int amdgpu_dm_set_hpd_irq_state(struct amdgpu_device *adev,
struct amdgpu_irq_src *source, struct amdgpu_irq_src *source,
unsigned type, unsigned type,
enum amdgpu_interrupt_state state) enum amdgpu_interrupt_state state)
{ {
enum dc_irq_source src = amdgpu_dm_hpd_to_dal_irq_source(type); enum dc_irq_source src = amdgpu_dm_hpd_to_dal_irq_source(type);
bool st = (state == AMDGPU_IRQ_STATE_ENABLE); bool st = (state == AMDGPU_IRQ_STATE_ENABLE);
@ -689,13 +675,12 @@ static int amdgpu_dm_set_hpd_irq_state(struct amdgpu_device *adev,
return 0; return 0;
} }
static inline int dm_irq_state( static inline int dm_irq_state(struct amdgpu_device *adev,
struct amdgpu_device *adev, struct amdgpu_irq_src *source,
struct amdgpu_irq_src *source, unsigned crtc_id,
unsigned crtc_id, enum amdgpu_interrupt_state state,
enum amdgpu_interrupt_state state, const enum irq_type dal_irq_type,
const enum irq_type dal_irq_type, const char *func)
const char *func)
{ {
bool st; bool st;
enum dc_irq_source irq_source; enum dc_irq_source irq_source;
@ -719,9 +704,9 @@ static inline int dm_irq_state(
} }
static int amdgpu_dm_set_pflip_irq_state(struct amdgpu_device *adev, static int amdgpu_dm_set_pflip_irq_state(struct amdgpu_device *adev,
struct amdgpu_irq_src *source, struct amdgpu_irq_src *source,
unsigned crtc_id, unsigned crtc_id,
enum amdgpu_interrupt_state state) enum amdgpu_interrupt_state state)
{ {
return dm_irq_state( return dm_irq_state(
adev, adev,

38
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.h
View File

@ -39,8 +39,7 @@
* 0 - success * 0 - success
* non-zero - error * non-zero - error
*/ */
int amdgpu_dm_irq_init( int amdgpu_dm_irq_init(struct amdgpu_device *adev);
struct amdgpu_device *adev);
/** /**
* amdgpu_dm_irq_fini - deallocate internal structures of 'amdgpu_dm_irq'. * amdgpu_dm_irq_fini - deallocate internal structures of 'amdgpu_dm_irq'.
@ -48,8 +47,7 @@ int amdgpu_dm_irq_init(
* This function should be called exactly once - during DM destruction. * This function should be called exactly once - during DM destruction.
* *
*/ */
void amdgpu_dm_irq_fini( void amdgpu_dm_irq_fini(struct amdgpu_device *adev);
struct amdgpu_device *adev);
/** /**
* amdgpu_dm_irq_register_interrupt - register irq handler for Display block. * amdgpu_dm_irq_register_interrupt - register irq handler for Display block.
@ -65,11 +63,10 @@ void amdgpu_dm_irq_fini(
* *
* Cannot be called from an interrupt handler. * Cannot be called from an interrupt handler.
*/ */
void *amdgpu_dm_irq_register_interrupt( void *amdgpu_dm_irq_register_interrupt(struct amdgpu_device *adev,
struct amdgpu_device *adev, struct dc_interrupt_params *int_params,
struct dc_interrupt_params *int_params, void (*ih)(void *),
void (*ih)(void *), void *handler_args);
void *handler_args);
/** /**
* amdgpu_dm_irq_unregister_interrupt - unregister handler which was registered * amdgpu_dm_irq_unregister_interrupt - unregister handler which was registered
@ -79,26 +76,23 @@ void *amdgpu_dm_irq_register_interrupt(
* @ih_index: irq handler index which was returned by * @ih_index: irq handler index which was returned by
* amdgpu_dm_irq_register_interrupt * amdgpu_dm_irq_register_interrupt
*/ */
void amdgpu_dm_irq_unregister_interrupt( void amdgpu_dm_irq_unregister_interrupt(struct amdgpu_device *adev,
struct amdgpu_device *adev, enum dc_irq_source irq_source,
enum dc_irq_source irq_source, void *ih_index);
void *ih_index);
void amdgpu_dm_irq_register_timer( void amdgpu_dm_irq_register_timer(struct amdgpu_device *adev,
struct amdgpu_device *adev, struct dc_timer_interrupt_params *int_params,
struct dc_timer_interrupt_params *int_params, interrupt_handler ih,
interrupt_handler ih, void *args);
void *args);
/** /**
* amdgpu_dm_irq_handler * amdgpu_dm_irq_handler
* Generic IRQ handler, calls all registered high irq work immediately, and * Generic IRQ handler, calls all registered high irq work immediately, and
* schedules work for low irq * schedules work for low irq
*/ */
int amdgpu_dm_irq_handler( int amdgpu_dm_irq_handler(struct amdgpu_device *adev,
struct amdgpu_device *adev, struct amdgpu_irq_src *source,
struct amdgpu_irq_src *source, struct amdgpu_iv_entry *entry);
struct amdgpu_iv_entry *entry);
void amdgpu_dm_set_irq_funcs(struct amdgpu_device *adev); void amdgpu_dm_set_irq_funcs(struct amdgpu_device *adev);