AuxXxilium/linux_dsm_epyc7002
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net: hns3: Constify static structs

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A number of static variables were not modified. Make them const to allow
the compiler to put them in read-only memory. In order to do so,
constify a couple of input pointers as well as some local pointers.
This moves about 35Kb to read-only memory as seen by the output of the
size command.

Before:
   text    data     bss     dec     hex filename
 404938  111534     640  517112   7e3f8 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge.ko

After:
   text    data     bss     dec     hex filename
 439499   76974     640  517113   7e3f9 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge.ko

Signed-off-by: Rikard Falkeborn <rikard.falkeborn@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Rikard Falkeborn 2020-09-22 00:55:17 +02:00 committed by David S. Miller
parent 68d4fd30c8
commit e4b9146849
2 changed files with 18 additions and 18 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

10
drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c
View File

@ -8,7 +8,7 @@
#include "hclge_tm.h" #include "hclge_tm.h"
#include "hnae3.h" #include "hnae3.h"
static struct hclge_dbg_reg_type_info hclge_dbg_reg_info[] = { static const struct hclge_dbg_reg_type_info hclge_dbg_reg_info[] = {
{ .reg_type = "bios common", { .reg_type = "bios common",
.dfx_msg = &hclge_dbg_bios_common_reg[0], .dfx_msg = &hclge_dbg_bios_common_reg[0],
.reg_msg = { .msg_num = ARRAY_SIZE(hclge_dbg_bios_common_reg), .reg_msg = { .msg_num = ARRAY_SIZE(hclge_dbg_bios_common_reg),
@ -115,14 +115,14 @@ static int hclge_dbg_cmd_send(struct hclge_dev *hdev,
} }
static void hclge_dbg_dump_reg_common(struct hclge_dev *hdev, static void hclge_dbg_dump_reg_common(struct hclge_dev *hdev,
struct hclge_dbg_reg_type_info *reg_info, const struct hclge_dbg_reg_type_info *reg_info,
const char *cmd_buf) const char *cmd_buf)
{ {
#define IDX_OFFSET 1 #define IDX_OFFSET 1
const char *s = &cmd_buf[strlen(reg_info->reg_type) + IDX_OFFSET]; const char *s = &cmd_buf[strlen(reg_info->reg_type) + IDX_OFFSET];
struct hclge_dbg_dfx_message *dfx_message = reg_info->dfx_msg; const struct hclge_dbg_dfx_message *dfx_message = reg_info->dfx_msg;
struct hclge_dbg_reg_common_msg *reg_msg = &reg_info->reg_msg; const struct hclge_dbg_reg_common_msg *reg_msg = &reg_info->reg_msg;
struct hclge_desc *desc_src; struct hclge_desc *desc_src;
struct hclge_desc *desc; struct hclge_desc *desc;
int entries_per_desc; int entries_per_desc;
@ -399,7 +399,7 @@ static void hclge_dbg_dump_dcb(struct hclge_dev *hdev, const char *cmd_buf)
static void hclge_dbg_dump_reg_cmd(struct hclge_dev *hdev, const char *cmd_buf) static void hclge_dbg_dump_reg_cmd(struct hclge_dev *hdev, const char *cmd_buf)
{ {
struct hclge_dbg_reg_type_info *reg_info; const struct hclge_dbg_reg_type_info *reg_info;
bool has_dump = false; bool has_dump = false;
int i; int i;

26
drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.h
View File

@ -81,13 +81,13 @@ struct hclge_dbg_dfx_message {
#define HCLGE_DBG_MAC_REG_TYPE_LEN 32 #define HCLGE_DBG_MAC_REG_TYPE_LEN 32
struct hclge_dbg_reg_type_info { struct hclge_dbg_reg_type_info {
const char *reg_type; const char *reg_type;
struct hclge_dbg_dfx_message *dfx_msg; const struct hclge_dbg_dfx_message *dfx_msg;
struct hclge_dbg_reg_common_msg reg_msg; struct hclge_dbg_reg_common_msg reg_msg;
}; };
#pragma pack() #pragma pack()
static struct hclge_dbg_dfx_message hclge_dbg_bios_common_reg[] = { static const struct hclge_dbg_dfx_message hclge_dbg_bios_common_reg[] = {
{false, "Reserved"}, {false, "Reserved"},
{true, "BP_CPU_STATE"}, {true, "BP_CPU_STATE"},
{true, "DFX_MSIX_INFO_NIC_0"}, {true, "DFX_MSIX_INFO_NIC_0"},
@ -103,7 +103,7 @@ static struct hclge_dbg_dfx_message hclge_dbg_bios_common_reg[] = {
{false, "Reserved"}, {false, "Reserved"},
}; };
static struct hclge_dbg_dfx_message hclge_dbg_ssu_reg_0[] = { static const struct hclge_dbg_dfx_message hclge_dbg_ssu_reg_0[] = {
{false, "Reserved"}, {false, "Reserved"},
{true, "SSU_ETS_PORT_STATUS"}, {true, "SSU_ETS_PORT_STATUS"},
{true, "SSU_ETS_TCG_STATUS"}, {true, "SSU_ETS_TCG_STATUS"},
@ -175,7 +175,7 @@ static struct hclge_dbg_dfx_message hclge_dbg_ssu_reg_0[] = {
{false, "Reserved"}, {false, "Reserved"},
}; };
static struct hclge_dbg_dfx_message hclge_dbg_ssu_reg_1[] = { static const struct hclge_dbg_dfx_message hclge_dbg_ssu_reg_1[] = {
{true, "prt_id"}, {true, "prt_id"},
{true, "PACKET_TC_CURR_BUFFER_CNT_0"}, {true, "PACKET_TC_CURR_BUFFER_CNT_0"},
{true, "PACKET_TC_CURR_BUFFER_CNT_1"}, {true, "PACKET_TC_CURR_BUFFER_CNT_1"},
@ -282,7 +282,7 @@ static struct hclge_dbg_dfx_message hclge_dbg_ssu_reg_1[] = {
{false, "Reserved"}, {false, "Reserved"},
}; };
static struct hclge_dbg_dfx_message hclge_dbg_ssu_reg_2[] = { static const struct hclge_dbg_dfx_message hclge_dbg_ssu_reg_2[] = {
{true, "OQ_INDEX"}, {true, "OQ_INDEX"},
{true, "QUEUE_CNT"}, {true, "QUEUE_CNT"},
{false, "Reserved"}, {false, "Reserved"},
@ -291,7 +291,7 @@ static struct hclge_dbg_dfx_message hclge_dbg_ssu_reg_2[] = {
{false, "Reserved"}, {false, "Reserved"},
}; };
static struct hclge_dbg_dfx_message hclge_dbg_igu_egu_reg[] = { static const struct hclge_dbg_dfx_message hclge_dbg_igu_egu_reg[] = {
{true, "prt_id"}, {true, "prt_id"},
{true, "IGU_RX_ERR_PKT"}, {true, "IGU_RX_ERR_PKT"},
{true, "IGU_RX_NO_SOF_PKT"}, {true, "IGU_RX_NO_SOF_PKT"},
@ -356,7 +356,7 @@ static struct hclge_dbg_dfx_message hclge_dbg_igu_egu_reg[] = {
{false, "Reserved"}, {false, "Reserved"},
}; };
static struct hclge_dbg_dfx_message hclge_dbg_rpu_reg_0[] = { static const struct hclge_dbg_dfx_message hclge_dbg_rpu_reg_0[] = {
{true, "tc_queue_num"}, {true, "tc_queue_num"},
{true, "FSM_DFX_ST0"}, {true, "FSM_DFX_ST0"},
{true, "FSM_DFX_ST1"}, {true, "FSM_DFX_ST1"},
@ -365,7 +365,7 @@ static struct hclge_dbg_dfx_message hclge_dbg_rpu_reg_0[] = {
{true, "BUF_WAIT_TIMEOUT_QID"}, {true, "BUF_WAIT_TIMEOUT_QID"},
}; };
static struct hclge_dbg_dfx_message hclge_dbg_rpu_reg_1[] = { static const struct hclge_dbg_dfx_message hclge_dbg_rpu_reg_1[] = {
{false, "Reserved"}, {false, "Reserved"},
{true, "FIFO_DFX_ST0"}, {true, "FIFO_DFX_ST0"},
{true, "FIFO_DFX_ST1"}, {true, "FIFO_DFX_ST1"},
@ -381,7 +381,7 @@ static struct hclge_dbg_dfx_message hclge_dbg_rpu_reg_1[] = {
{false, "Reserved"}, {false, "Reserved"},
}; };
static struct hclge_dbg_dfx_message hclge_dbg_ncsi_reg[] = { static const struct hclge_dbg_dfx_message hclge_dbg_ncsi_reg[] = {
{false, "Reserved"}, {false, "Reserved"},
{true, "NCSI_EGU_TX_FIFO_STS"}, {true, "NCSI_EGU_TX_FIFO_STS"},
{true, "NCSI_PAUSE_STATUS"}, {true, "NCSI_PAUSE_STATUS"},
@ -453,7 +453,7 @@ static struct hclge_dbg_dfx_message hclge_dbg_ncsi_reg[] = {
{true, "NCSI_MAC_RX_PAUSE_FRAMES"}, {true, "NCSI_MAC_RX_PAUSE_FRAMES"},
}; };
static struct hclge_dbg_dfx_message hclge_dbg_rtc_reg[] = { static const struct hclge_dbg_dfx_message hclge_dbg_rtc_reg[] = {
{false, "Reserved"}, {false, "Reserved"},
{true, "LGE_IGU_AFIFO_DFX_0"}, {true, "LGE_IGU_AFIFO_DFX_0"},
{true, "LGE_IGU_AFIFO_DFX_1"}, {true, "LGE_IGU_AFIFO_DFX_1"},
@ -483,7 +483,7 @@ static struct hclge_dbg_dfx_message hclge_dbg_rtc_reg[] = {
{false, "Reserved"}, {false, "Reserved"},
}; };
static struct hclge_dbg_dfx_message hclge_dbg_ppp_reg[] = { static const struct hclge_dbg_dfx_message hclge_dbg_ppp_reg[] = {
{false, "Reserved"}, {false, "Reserved"},
{true, "DROP_FROM_PRT_PKT_CNT"}, {true, "DROP_FROM_PRT_PKT_CNT"},
{true, "DROP_FROM_HOST_PKT_CNT"}, {true, "DROP_FROM_HOST_PKT_CNT"},
@ -639,7 +639,7 @@ static struct hclge_dbg_dfx_message hclge_dbg_ppp_reg[] = {
{false, "Reserved"}, {false, "Reserved"},
}; };
static struct hclge_dbg_dfx_message hclge_dbg_rcb_reg[] = { static const struct hclge_dbg_dfx_message hclge_dbg_rcb_reg[] = {
{false, "Reserved"}, {false, "Reserved"},
{true, "FSM_DFX_ST0"}, {true, "FSM_DFX_ST0"},
{true, "FSM_DFX_ST1"}, {true, "FSM_DFX_ST1"},
@ -711,7 +711,7 @@ static struct hclge_dbg_dfx_message hclge_dbg_rcb_reg[] = {
{false, "Reserved"}, {false, "Reserved"},
}; };
static struct hclge_dbg_dfx_message hclge_dbg_tqp_reg[] = { static const struct hclge_dbg_dfx_message hclge_dbg_tqp_reg[] = {
{true, "q_num"}, {true, "q_num"},
{true, "RCB_CFG_RX_RING_TAIL"}, {true, "RCB_CFG_RX_RING_TAIL"},
{true, "RCB_CFG_RX_RING_HEAD"}, {true, "RCB_CFG_RX_RING_HEAD"},