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ARM: dts: artpec: add and utilize nbpfaxi DMA controllers
Add nodes for the nbpfaxi DMA controllers used in the artpec6 SoC, and start using them for the exising UARTs. Signed-off-by: Niklas Cassel <niklas.cassel@axis.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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@ -41,6 +41,7 @@
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*/
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*/
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/dma/nbpfaxi.h>
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#include <dt-bindings/clock/axis,artpec6-clkctrl.h>
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#include <dt-bindings/clock/axis,artpec6-clkctrl.h>
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#include "skeleton.dtsi"
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#include "skeleton.dtsi"
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@ -213,6 +214,51 @@ amba@0 {
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ranges;
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ranges;
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dma-ranges;
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dma-ranges;
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dma0: dma@f8019000 {
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compatible = "renesas,nbpfaxi64dmac8b16";
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reg = <0xf8019000 0x400>;
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interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>, /* error */
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<GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "error",
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"ch0", "ch1", "ch2", "ch3",
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"ch4", "ch5", "ch6", "ch7",
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"ch8", "ch9", "ch10", "ch12",
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"ch12", "ch13", "ch14", "ch15";
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clocks = <&clkctrl ARTPEC6_CLK_DMA_ACLK>;
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#dma-cells = <2>;
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dma-channels = <8>;
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dma-requests = <8>;
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};
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dma1: dma@f8019400 {
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compatible = "renesas,nbpfaxi64dmac8b16";
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reg = <0xf8019400 0x400>;
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interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>, /* error */
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<GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "error",
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"ch0", "ch1", "ch2", "ch3",
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"ch4", "ch5", "ch6", "ch7",
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"ch8", "ch9", "ch10", "ch12",
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"ch12", "ch13", "ch14", "ch15";
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clocks = <&clkctrl ARTPEC6_CLK_DMA_ACLK>;
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#dma-cells = <2>;
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dma-channels = <8>;
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dma-requests = <8>;
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};
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ethernet: ethernet@f8010000 {
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ethernet: ethernet@f8010000 {
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clock-names = "stmmaceth", "ptp_ref";
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clock-names = "stmmaceth", "ptp_ref";
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clocks = <&clkctrl ARTPEC6_CLK_ETH_ACLK>,
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clocks = <&clkctrl ARTPEC6_CLK_ETH_ACLK>,
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@ -266,6 +312,9 @@ uart0: serial@f8036000 {
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clock-names = "uart_clk", "apb_pclk";
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clock-names = "uart_clk", "apb_pclk";
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pinctrl-names = "default";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart0>;
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pinctrl-0 = <&pinctrl_uart0>;
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dmas = <&dma0 4 (NBPF_SLAVE_RQ_HIGH | NBPF_SLAVE_RQ_LEVEL)>,
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<&dma0 5 (NBPF_SLAVE_RQ_HIGH | NBPF_SLAVE_RQ_LEVEL)>;
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dma-names = "rx", "tx";
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status = "disabled";
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status = "disabled";
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};
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};
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uart1: serial@f8037000 {
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uart1: serial@f8037000 {
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@ -277,6 +326,9 @@ uart1: serial@f8037000 {
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clock-names = "uart_clk", "apb_pclk";
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clock-names = "uart_clk", "apb_pclk";
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pinctrl-names = "default";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart1>;
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pinctrl-0 = <&pinctrl_uart1>;
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dmas = <&dma0 6 (NBPF_SLAVE_RQ_HIGH | NBPF_SLAVE_RQ_LEVEL)>,
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<&dma0 7 (NBPF_SLAVE_RQ_HIGH | NBPF_SLAVE_RQ_LEVEL)>;
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dma-names = "rx", "tx";
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status = "disabled";
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status = "disabled";
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};
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};
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uart2: serial@f8038000 {
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uart2: serial@f8038000 {
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@ -288,6 +340,9 @@ uart2: serial@f8038000 {
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clock-names = "uart_clk", "apb_pclk";
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clock-names = "uart_clk", "apb_pclk";
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pinctrl-names = "default";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart2>;
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pinctrl-0 = <&pinctrl_uart2>;
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dmas = <&dma1 0 (NBPF_SLAVE_RQ_HIGH | NBPF_SLAVE_RQ_LEVEL)>,
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<&dma1 1 (NBPF_SLAVE_RQ_HIGH | NBPF_SLAVE_RQ_LEVEL)>;
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dma-names = "rx", "tx";
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status = "disabled";
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status = "disabled";
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};
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};
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uart3: serial@f8039000 {
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uart3: serial@f8039000 {
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@ -299,6 +354,9 @@ uart3: serial@f8039000 {
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clock-names = "uart_clk", "apb_pclk";
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clock-names = "uart_clk", "apb_pclk";
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pinctrl-names = "default";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart3>;
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pinctrl-0 = <&pinctrl_uart3>;
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dmas = <&dma1 2 (NBPF_SLAVE_RQ_HIGH | NBPF_SLAVE_RQ_LEVEL)>,
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<&dma1 3 (NBPF_SLAVE_RQ_HIGH | NBPF_SLAVE_RQ_LEVEL)>;
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dma-names = "rx", "tx";
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status = "disabled";
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status = "disabled";
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};
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};
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};
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};
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