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dt-bindings: drm/bridge: Document sn65dsi86 bridge bindings
Document the bindings used for the sn65dsi86 DSI to eDP bridge. Changes in v1: - Rephrase the dt-binding descriptions to be more inline with existing bindings (Andrzej Hajda). - Add missing dt-binding that are parsed by corresponding driver (Andrzej Hajda). Changes in v2: - Remove edp panel specific dt-binding entries. Only keep bridge specific entries (Sean Paul). - Remove custom-modes dt entry since its usage is removed from driver also (Sean Paul). - Remove is-pluggable dt entry since this will not be needed anymore (Sean Paul). Changes in v3: - Remove irq-gpio dt entry and instead populate is an interrupt property (Rob Herring). Changes in v4: - Add link to bridge chip datasheet (Stephen Boyd) - Add vpll and vcc regulator supply bindings (Stephen Boyd) - Add ref clk optional dt binding (Stephen Boyd) - Add gpio-controller optional dt binding (Stephen Boyd) Changes in v5: - Use clock property to specify the input refclk (Stephen Boyd). - Update gpio cell and pwm cell numbers (Stephen Boyd). Changes in v6: - Add property to mention the lane mapping scheme and polarity inversion (Stephen Boyd). Changes in v7: - Detail description of lane mapping scheme dt property (Andrzej Hajda/ Rob Herring). - Removed HDP gpio binding, since the bridge uses IRQ signal to determine HPD, and IRQ property is already documented in binding. Changes in v8: - Removed unnecessary explanation of lane mapping and polarity dt property, since these are already explained in media/video-interface dt binidng (Rob Herring). Changes in v9: - Avoid putting re-definition of lane mapping and polarity dt binding (Rob Herring). Changes in v10: - Use interrupts-extended property instead of interrupts to specify interrupt line (Andrzej Hajda). - Move data-lanes and lane-polarity property example to proper place (Andrzej Hajda). Changes in v11: - Add a property for suspend gpio function of GPIO1 pin on bridge chip (Stephen Boyd). Changes in v12: - Remove binding for dedicated DDC line (Andrzej Hajda). Signed-off-by: Sandeep Panda <spanda@codeaurora.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Andrzej Hajda <a.hajda@samsung.com> Link: https://patchwork.freedesktop.org/patch/msgid/20180716084330.26698-3-spanda@codeaurora.org
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SN65DSI86 DSI to eDP bridge chip
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--------------------------------
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This is the binding for Texas Instruments SN65DSI86 bridge.
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http://www.ti.com/general/docs/lit/getliterature.tsp?genericPartNumber=sn65dsi86&fileType=pdf
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Required properties:
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- compatible: Must be "ti,sn65dsi86"
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- reg: i2c address of the chip, 0x2d as per datasheet
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- enable-gpios: gpio specification for bridge_en pin (active high)
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- vccio-supply: A 1.8V supply that powers up the digital IOs.
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- vpll-supply: A 1.8V supply that powers up the displayport PLL.
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- vcca-supply: A 1.2V supply that powers up the analog circuits.
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- vcc-supply: A 1.2V supply that powers up the digital core.
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Optional properties:
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- interrupts-extended: Specifier for the SN65DSI86 interrupt line.
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- gpio-controller: Marks the device has a GPIO controller.
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- #gpio-cells : Should be two. The first cell is the pin number and
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the second cell is used to specify flags.
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See ../../gpio/gpio.txt for more information.
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- #pwm-cells : Should be one. See ../../pwm/pwm.txt for description of
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the cell formats.
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- clock-names: should be "refclk"
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- clocks: Specification for input reference clock. The reference
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clock rate must be 12 MHz, 19.2 MHz, 26 MHz, 27 MHz or 38.4 MHz.
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- data-lanes: See ../../media/video-interface.txt
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- lane-polarities: See ../../media/video-interface.txt
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- suspend-gpios: specification for GPIO1 pin on bridge (active low)
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Required nodes:
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This device has two video ports. Their connections are modelled using the
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OF graph bindings specified in Documentation/devicetree/bindings/graph.txt.
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- Video port 0 for DSI input
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- Video port 1 for eDP output
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Example
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-------
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edp-bridge@2d {
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compatible = "ti,sn65dsi86";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x2d>;
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enable-gpios = <&msmgpio 33 GPIO_ACTIVE_HIGH>;
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suspend-gpios = <&msmgpio 34 GPIO_ACTIVE_LOW>;
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interrupts-extended = <&gpio3 4 IRQ_TYPE_EDGE_FALLING>;
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vccio-supply = <&pm8916_l17>;
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vcca-supply = <&pm8916_l6>;
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vpll-supply = <&pm8916_l17>;
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vcc-supply = <&pm8916_l6>;
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clock-names = "refclk";
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clocks = <&input_refclk>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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edp_bridge_in: endpoint {
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remote-endpoint = <&dsi_out>;
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};
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};
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port@1 {
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reg = <1>;
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edp_bridge_out: endpoint {
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data-lanes = <2 1 3 0>;
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lane-polarities = <0 1 0 1>;
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remote-endpoint = <&edp_panel_in>;
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};
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};
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};
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}
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