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drm/i915/gvt: Move clean_workloads() into scheduler.c
Move clean_workloads() into scheduler.c since it's not specific to execlist. v2: - Remove clean_workloads in intel_vgpu_select_submission_ops. (Zhenyu) Signed-off-by: Zhi Wang <zhi.a.wang@intel.com>
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@ -46,8 +46,6 @@
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#define same_context(a, b) (((a)->context_id == (b)->context_id) && \
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((a)->lrca == (b)->lrca))
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static void clean_workloads(struct intel_vgpu *vgpu, unsigned long engine_mask);
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static int context_switch_events[] = {
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[RCS] = RCS_AS_CONTEXT_SWITCH,
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[BCS] = BCS_AS_CONTEXT_SWITCH,
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@ -397,23 +395,8 @@ static int complete_execlist_workload(struct intel_vgpu_workload *workload)
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gvt_dbg_el("complete workload %p status %d\n", workload,
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workload->status);
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if (workload->status || (vgpu->resetting_eng & ENGINE_MASK(ring_id))) {
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/* if workload->status is not successful means HW GPU
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* has occurred GPU hang or something wrong with i915/GVT,
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* and GVT won't inject context switch interrupt to guest.
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* So this error is a vGPU hang actually to the guest.
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* According to this we should emunlate a vGPU hang. If
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* there are pending workloads which are already submitted
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* from guest, we should clean them up like HW GPU does.
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*
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* if it is in middle of engine resetting, the pending
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* workloads won't be submitted to HW GPU and will be
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* cleaned up during the resetting process later, so doing
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* the workload clean up here doesn't have any impact.
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**/
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clean_workloads(vgpu, ENGINE_MASK(ring_id));
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if (workload->status || (vgpu->resetting_eng & ENGINE_MASK(ring_id)))
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goto out;
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}
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if (!list_empty(workload_q_head(vgpu, ring_id))) {
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struct execlist_ctx_descriptor_format *this_desc, *next_desc;
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@ -529,32 +512,11 @@ static void init_vgpu_execlist(struct intel_vgpu *vgpu, int ring_id)
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vgpu_vreg(vgpu, ctx_status_ptr_reg) = ctx_status_ptr.dw;
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}
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static void clean_workloads(struct intel_vgpu *vgpu, unsigned long engine_mask)
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{
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struct intel_vgpu_submission *s = &vgpu->submission;
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struct drm_i915_private *dev_priv = vgpu->gvt->dev_priv;
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struct intel_engine_cs *engine;
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struct intel_vgpu_workload *pos, *n;
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unsigned int tmp;
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/* free the unsubmited workloads in the queues. */
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for_each_engine_masked(engine, dev_priv, engine_mask, tmp) {
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list_for_each_entry_safe(pos, n,
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&s->workload_q_head[engine->id], list) {
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list_del_init(&pos->list);
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intel_vgpu_destroy_workload(pos);
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}
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clear_bit(engine->id, s->shadow_ctx_desc_updated);
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}
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}
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void clean_execlist(struct intel_vgpu *vgpu)
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{
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enum intel_engine_id i;
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struct intel_engine_cs *engine;
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clean_workloads(vgpu, ALL_ENGINES);
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for_each_engine(engine, vgpu->gvt->dev_priv, i) {
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struct intel_vgpu_submission *s = &vgpu->submission;
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@ -571,7 +533,6 @@ void reset_execlist(struct intel_vgpu *vgpu,
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struct intel_engine_cs *engine;
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unsigned int tmp;
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clean_workloads(vgpu, engine_mask);
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for_each_engine_masked(engine, dev_priv, engine_mask, tmp)
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init_vgpu_execlist(vgpu, engine->id);
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}
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@ -644,6 +644,25 @@ static void update_guest_context(struct intel_vgpu_workload *workload)
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kunmap(page);
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}
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static void clean_workloads(struct intel_vgpu *vgpu, unsigned long engine_mask)
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{
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struct intel_vgpu_submission *s = &vgpu->submission;
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struct drm_i915_private *dev_priv = vgpu->gvt->dev_priv;
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struct intel_engine_cs *engine;
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struct intel_vgpu_workload *pos, *n;
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unsigned int tmp;
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/* free the unsubmited workloads in the queues. */
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for_each_engine_masked(engine, dev_priv, engine_mask, tmp) {
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list_for_each_entry_safe(pos, n,
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&s->workload_q_head[engine->id], list) {
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list_del_init(&pos->list);
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intel_vgpu_destroy_workload(pos);
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}
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clear_bit(engine->id, s->shadow_ctx_desc_updated);
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}
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}
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static void complete_current_workload(struct intel_gvt *gvt, int ring_id)
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{
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struct intel_gvt_workload_scheduler *scheduler = &gvt->scheduler;
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@ -707,6 +726,23 @@ static void complete_current_workload(struct intel_gvt *gvt, int ring_id)
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release_shadow_wa_ctx(&workload->wa_ctx);
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}
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if (workload->status || (vgpu->resetting_eng & ENGINE_MASK(ring_id))) {
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/* if workload->status is not successful means HW GPU
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* has occurred GPU hang or something wrong with i915/GVT,
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* and GVT won't inject context switch interrupt to guest.
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* So this error is a vGPU hang actually to the guest.
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* According to this we should emunlate a vGPU hang. If
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* there are pending workloads which are already submitted
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* from guest, we should clean them up like HW GPU does.
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*
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* if it is in middle of engine resetting, the pending
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* workloads won't be submitted to HW GPU and will be
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* cleaned up during the resetting process later, so doing
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* the workload clean up here doesn't have any impact.
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**/
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clean_workloads(vgpu, ENGINE_MASK(ring_id));
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}
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workload->complete(workload);
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atomic_dec(&s->running_workload_num);
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@ -906,6 +942,7 @@ void intel_vgpu_reset_submission(struct intel_vgpu *vgpu,
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if (!s->active)
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return;
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clean_workloads(vgpu, engine_mask);
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s->ops->reset(vgpu, engine_mask);
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}
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