mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2025-01-18 09:46:37 +07:00
Samsung DT updates for v4.2
- for exyos3250 : use s3c6410-rtc instead of exynos3250-rtc : add JPEG codec node and support it on exynos3250-rinato : use s3c-rtc clock id for exynos3250-rinato and monk boards - for exynos4 : add JPEG codec node and syscon property to MIPI DPHY : remove obsolete MIPI DPHY reg property : enable s3c-rtc on exynos4412-trats2 - for exynos5 : add syscon property to MIPI DPHY for exynos5420 : enable s3c-rtc on exynos5420-arndale-octa : add missing irq pinctrl for max77686 on exynos5250-smdk5250 : clk: add bindings for 32kHz clocks from s2mps11 : fix pinctrl for s2mps11-irq on exynos5420-arndale-octa - for exynos5422-odroidxu3 : add mmc detect gpio and LEDs : add HS400 support, simple-audio-card and rtc_src clock -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iQIcBAABAgAGBQJVcdi/AAoJEA0Cl+kVi2xqpSUQAIyssldks3xXgM5xH7FbQO+o az4havpqNm/1P6b2QWEW4+NejrrHrs5SYGAQBFmE/ziMCDfDGiMsnwCZleRRoWXs oPndr2fLtVBzFR+IGZbEdCQ7e3RC6x/Sn0RVJsYLvhaUjQhI1TxhR/xGUF0nsjrL BM1bvXFPLL0p3qzCxyPPIz2k3o8YyKiLC3WiUX+pOIb7cHT1wH/sz7/lfH/Lbsmz wLMgUZqHsFan48qsMFDHNKChkgL4Ph/prPTM6AmDTTz/KzK2FLz8IojDKUDfBJvB lCPxn9AZ/mpSt+8zxSuWfKhaInOZ+t2AhxjKbks28RMcJtrttTYt1dIBld5J2u7p 25DClKmL8/UbUp0AyHD3NTo5+RUlwz2pChVrFW3LjE3lgTBzy0zx0wcs0Rhr7y3L 12FuV8YC7olIgP4YiPwRAVty9nFlbPWCvQu6lamYWW4XB40e1UXxk/bPSaL9hlNz HN2skHVRh7uGwa9txPQFkWXPjdfSmWAuhu7VA+E8hMRSeND9hcbseImkq1S8MCNd n17vIb4g3IwMAj/lGYJJNJ+DRhRuYeK1yjSfqpswlNxGqlHuKKbKxiuT+MR+NpvE YM7o2Vs5V1dJB5iJZxyxh+fzz/Cz8N2Qj7If1lDJC6I1Z5qlQk/1r4gONPDEorn0 iAliP2yOAj2/cTylK73m =bWPy -----END PGP SIGNATURE----- Merge tag 'samsung-dt-3' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/dt Samsung DT updates for v4.2 - for exyos3250 : use s3c6410-rtc instead of exynos3250-rtc : add JPEG codec node and support it on exynos3250-rinato : use s3c-rtc clock id for exynos3250-rinato and monk boards - for exynos4 : add JPEG codec node and syscon property to MIPI DPHY : remove obsolete MIPI DPHY reg property : enable s3c-rtc on exynos4412-trats2 - for exynos5 : add syscon property to MIPI DPHY for exynos5420 : enable s3c-rtc on exynos5420-arndale-octa : add missing irq pinctrl for max77686 on exynos5250-smdk5250 : clk: add bindings for 32kHz clocks from s2mps11 : fix pinctrl for s2mps11-irq on exynos5420-arndale-octa - for exynos5422-odroidxu3 : add mmc detect gpio and LEDs : add HS400 support, simple-audio-card and rtc_src clock * tag 'samsung-dt-3' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: ARM: dts: Add syscon property to the MIPI DPHY for exynos4415 ARM: dts: Remove obsolete MIPI DPHY 'reg' property for exynos4 ARM: dts: Use last parent for clocks during power domain on/off ARM: dts: add support JPEG codec for exynos3250-rinato ARM: dts: support simple-audio-card for exynos5420 and exynos5422-odroidxu3 ARM: dts: add jpeg-codec node for exynos4 and exynos4x12 ARM: dts: Enable S3C RTC on exynos4412-trats2 and exynos5420-arndale-octa ARM: dts: Use define for s3c-rtc clock id for exynos3250-monk ARM: dts: Use define for s3c-rtc clock id for exynos3250-rinato ARM: dts: Use s3c6410-rtc instead of exynos3250-rtc for exynos3250/4415 ARM: dts: add 'rtc_src' clock to rtc node for exynos5422-odroidxu3 clk: samsung: Add bindings for 32kHz clocks from s2mps11 ARM: dts: fix pinctrl for s2mps11-irq on exynos5420-arndale-octa ARM: dts: Add syscon property to the MIPI phy in exynos5420 ARM: dts: Add HS400 support for exynos5422-odroidxu3 ARM: dts: Add LEDs for exynos5422-odroidxu3 ARM: dts: add mmc detect gpio for exynos5422-odroidxu3 ARM: dts: add JPEG codec device node for exynos3250 ARM: dts: Add missing irq pinctrl for max77686 on smdk5250
This commit is contained in:
Kevin Hilman
commit
e28f23d8aa
@ -6,7 +6,8 @@ Required properties:
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* "samsung,s3c2416-rtc" - for controllers compatible with s3c2416 rtc.
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* "samsung,s3c2443-rtc" - for controllers compatible with s3c2443 rtc.
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* "samsung,s3c6410-rtc" - for controllers compatible with s3c6410 rtc.
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* "samsung,exynos3250-rtc" - for controllers compatible with exynos3250 rtc.
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* "samsung,exynos3250-rtc" - (deprecated) for controllers compatible with
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exynos3250 rtc (use "samsung,s3c6410-rtc").
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- reg: physical base address of the controller and length of memory mapped
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region.
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- interrupts: Two interrupt numbers to the cpu should be specified. First
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@ -16,6 +16,7 @@
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#include "exynos3250.dtsi"
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/clock/samsung,s2mps11.h>
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/ {
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model = "Samsung Monk board";
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@ -432,7 +433,7 @@ &tmu {
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};
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&rtc {
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clocks = <&cmu CLK_RTC>, <&s2mps14_osc 0>;
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clocks = <&cmu CLK_RTC>, <&s2mps14_osc S2MPS11_CLK_AP>;
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clock-names = "rtc", "rtc_src";
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status = "okay";
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};
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@ -16,6 +16,7 @@
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#include "exynos3250.dtsi"
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/clock/samsung,s2mps11.h>
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/ {
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model = "Samsung Rinato board";
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@ -567,6 +568,10 @@ &mfc {
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status = "okay";
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};
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&jpeg {
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status = "okay";
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};
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&mshc_0 {
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#address-cells = <1>;
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#size-cells = <0>;
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@ -605,7 +610,7 @@ &tmu {
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};
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&rtc {
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clocks = <&cmu CLK_RTC>, <&s2mps14_osc 0>;
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clocks = <&cmu CLK_RTC>, <&s2mps14_osc S2MPS11_CLK_AP>;
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clock-names = "rtc", "rtc_src";
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status = "okay";
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};
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@ -189,7 +189,7 @@ cmu_dmc: clock-controller@105C0000 {
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};
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rtc: rtc@10070000 {
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compatible = "samsung,exynos3250-rtc";
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compatible = "samsung,s3c6410-rtc";
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reg = <0x10070000 0x100>;
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interrupts = <0 73 0>, <0 74 0>;
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interrupt-parent = <&pmu_system_controller>;
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@ -243,6 +243,19 @@ pinctrl_0: pinctrl@11400000 {
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interrupts = <0 240 0>;
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};
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jpeg: codec@11830000 {
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compatible = "samsung,exynos3250-jpeg";
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reg = <0x11830000 0x1000>;
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interrupts = <0 171 0>;
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clocks = <&cmu CLK_JPEG>, <&cmu CLK_SCLK_JPEG>;
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clock-names = "jpeg", "sclk";
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power-domains = <&pd_cam>;
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assigned-clocks = <&cmu CLK_MOUT_CAM_BLK>, <&cmu CLK_SCLK_JPEG>;
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assigned-clock-rates = <0>, <150000000>;
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assigned-clock-parents = <&cmu CLK_DIV_MPLL_PRE>;
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status = "disabled";
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};
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fimd: fimd@11c00000 {
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compatible = "samsung,exynos3250-fimd";
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reg = <0x11c00000 0x30000>;
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@ -78,7 +78,6 @@ chipid@10000000 {
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mipi_phy: video-phy@10020710 {
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compatible = "samsung,s5pv210-mipi-video-phy";
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reg = <0x10020710 8>;
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#phy-cells = <1>;
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syscon = <&pmu_system_controller>;
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};
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@ -266,7 +265,7 @@ watchdog@10060000 {
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status = "disabled";
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};
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rtc@10070000 {
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rtc: rtc@10070000 {
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compatible = "samsung,s3c6410-rtc";
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reg = <0x10070000 0x100>;
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interrupt-parent = <&pmu_system_controller>;
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@ -689,6 +688,15 @@ tmu: tmu@100C0000 {
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#include "exynos4412-tmu-sensor-conf.dtsi"
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};
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jpeg-codec@11840000 {
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compatible = "samsung,exynos4210-jpeg";
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reg = <0x11840000 0x1000>;
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interrupts = <0 88 0>;
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clocks = <&clock CLK_JPEG>;
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clock-names = "jpeg";
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power-domains = <&pd_cam>;
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};
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hdmi: hdmi@12D00000 {
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compatible = "samsung,exynos4210-hdmi";
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reg = <0x12D00000 0x70000>;
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@ -16,6 +16,7 @@
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#include "exynos4412.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/clock/maxim,max77686.h>
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/ {
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model = "Samsung Trats 2 based on Exynos4412";
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@ -214,7 +215,7 @@ i2c@138D0000 {
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pinctrl-names = "default";
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status = "okay";
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max77686_pmic@09 {
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max77686: max77686_pmic@09 {
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compatible = "maxim,max77686";
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interrupt-parent = <&gpx0>;
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interrupts = <7 0>;
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@ -1304,3 +1305,9 @@ sleep3: sleep-states {
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PIN_SLP(gpv4-0, INPUT, DOWN);
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};
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};
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&rtc {
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status = "okay";
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clocks = <&clock CLK_RTC>, <&max77686 MAX77686_CLK_AP>;
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clock-names = "rtc", "rtc_src";
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};
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@ -124,8 +124,8 @@ pmu_system_controller: system-controller@10020000 {
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mipi_phy: video-phy@10020710 {
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compatible = "samsung,s5pv210-mipi-video-phy";
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reg = <0x10020710 8>;
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#phy-cells = <1>;
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syscon = <&pmu_system_controller>;
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};
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pd_cam: cam-power-domain@10024000 {
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@ -177,7 +177,7 @@ cmu: clock-controller@10030000 {
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};
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rtc: rtc@10070000 {
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compatible = "samsung,exynos3250-rtc";
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compatible = "samsung,s3c6410-rtc";
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reg = <0x10070000 0x100>;
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interrupts = <0 73 0>, <0 74 0>;
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status = "disabled";
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@ -299,6 +299,10 @@ tmu@100C0000 {
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status = "disabled";
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};
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jpeg-codec@11840000 {
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compatible = "samsung,exynos4212-jpeg";
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};
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hdmi: hdmi@12D00000 {
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compatible = "samsung,exynos4212-hdmi";
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};
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@ -131,6 +131,9 @@ max77686@09 {
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reg = <0x09>;
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interrupt-parent = <&gpx3>;
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interrupts = <2 IRQ_TYPE_NONE>;
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pinctrl-names = "default";
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pinctrl-0 = <&max77686_irq>;
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wakeup-source;
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voltage-regulators {
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ldo1_reg: LDO1 {
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@ -410,3 +413,12 @@ partition@40000 {
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};
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};
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};
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&pinctrl_0 {
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max77686_irq: max77686-irq {
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samsung,pins = "gpx3-2";
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samsung,pin-function = <0xf>;
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samsung,pin-pud = <0>;
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samsung,pin-drv = <0>;
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};
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};
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@ -13,6 +13,7 @@
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#include "exynos5420.dtsi"
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/clock/samsung,s2mps11.h>
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/ {
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model = "Insignal Arndale Octa evaluation board based on EXYNOS5420";
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@ -38,10 +39,6 @@ oscclk {
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};
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};
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rtc@101E0000 {
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status = "okay";
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};
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codec@11000000 {
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samsung,mfc-r = <0x43000000 0x800000>;
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samsung,mfc-l = <0x51000000 0x800000>;
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@ -90,7 +87,9 @@ s2mps11_pmic@66 {
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s2mps11,buck4-ramp-enable = <1>;
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interrupt-parent = <&gpx3>;
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interrupts = <2 IRQ_TYPE_LEVEL_HIGH>;
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interrupts = <2 IRQ_TYPE_EDGE_FALLING>;
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pinctrl-names = "default";
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pinctrl-0 = <&s2mps11_irq>;
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s2mps11_osc: clocks {
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#clock-cells = <1>;
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@ -376,3 +375,18 @@ &usbdrd_dwc3_1 {
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&cci {
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status = "disabled";
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};
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&pinctrl_0 {
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s2mps11_irq: s2mps11-irq {
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samsung,pins = "gpx3-2";
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samsung,pin-function = <0xf>;
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samsung,pin-pud = <0>;
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samsung,pin-drv = <0>;
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};
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};
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&rtc {
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status = "okay";
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clocks = <&clock CLK_RTC>, <&s2mps11_osc S2MPS11_CLK_AP>;
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clock-names = "rtc", "rtc_src";
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};
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@ -264,9 +264,8 @@ isp_pd: power-domain@10044020 {
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mfc_pd: power-domain@10044060 {
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compatible = "samsung,exynos4210-pd";
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reg = <0x10044060 0x20>;
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clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MOUT_SW_ACLK333>,
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<&clock CLK_MOUT_USER_ACLK333>;
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clock-names = "oscclk", "pclk0", "clk0";
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clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MOUT_USER_ACLK333>;
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clock-names = "oscclk", "clk0";
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#power-domain-cells = <0>;
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};
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@ -280,16 +279,12 @@ disp_pd: power-domain@100440C0 {
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compatible = "samsung,exynos4210-pd";
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reg = <0x100440C0 0x20>;
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#power-domain-cells = <0>;
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clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MOUT_SW_ACLK200>,
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clocks = <&clock CLK_FIN_PLL>,
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<&clock CLK_MOUT_USER_ACLK200_DISP1>,
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<&clock CLK_MOUT_SW_ACLK300>,
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<&clock CLK_MOUT_USER_ACLK300_DISP1>,
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<&clock CLK_MOUT_SW_ACLK400>,
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<&clock CLK_MOUT_USER_ACLK400_DISP1>,
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<&clock CLK_FIMD1>, <&clock CLK_MIXER>;
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clock-names = "oscclk", "pclk0", "clk0",
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"pclk1", "clk1", "pclk2", "clk2",
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"asb0", "asb1";
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clock-names = "oscclk", "clk0", "clk1", "clk2", "asb0", "asb1";
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};
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pinctrl_0: pinctrl@13400000 {
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@ -416,6 +411,9 @@ &adma 2
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<&clock_audss EXYNOS_I2S_BUS>,
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<&clock_audss EXYNOS_SCLK_I2S>;
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clock-names = "iis", "i2s_opclk0", "i2s_opclk1";
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#clock-cells = <1>;
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clock-output-names = "i2s_cdclk0";
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#sound-dai-cells = <1>;
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samsung,idma-addr = <0x03000000>;
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pinctrl-names = "default";
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pinctrl-0 = <&i2s0_bus>;
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@ -430,6 +428,9 @@ i2s1: i2s@12D60000 {
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dma-names = "tx", "rx";
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clocks = <&clock CLK_I2S1>, <&clock CLK_SCLK_I2S1>;
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clock-names = "iis", "i2s_opclk0";
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#clock-cells = <1>;
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clock-output-names = "i2s_cdclk1";
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#sound-dai-cells = <1>;
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pinctrl-names = "default";
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pinctrl-0 = <&i2s1_bus>;
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status = "disabled";
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@ -443,6 +444,9 @@ i2s2: i2s@12D70000 {
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dma-names = "tx", "rx";
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clocks = <&clock CLK_I2S2>, <&clock CLK_SCLK_I2S2>;
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clock-names = "iis", "i2s_opclk0";
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#clock-cells = <1>;
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clock-output-names = "i2s_cdclk2";
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#sound-dai-cells = <1>;
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pinctrl-names = "default";
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pinctrl-0 = <&i2s2_bus>;
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status = "disabled";
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@ -541,7 +545,7 @@ dp: dp-controller@145B0000 {
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mipi_phy: video-phy@10040714 {
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compatible = "samsung,s5pv210-mipi-video-phy";
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reg = <0x10040714 12>;
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syscon = <&pmu_system_controller>;
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#phy-cells = <1>;
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};
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@ -11,6 +11,9 @@
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*/
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/dts-v1/;
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#include <dt-bindings/clock/samsung,s2mps11.h>
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/sound/samsung-i2s.h>
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#include "exynos5800.dtsi"
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/ {
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@ -282,9 +285,87 @@ hdmiddc@50 {
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};
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};
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|
||||
rtc@101E0000 {
|
||||
status = "okay";
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
heartbeat {
|
||||
label = "blue:heartbeart";
|
||||
gpios = <&gpb2 2 0>;
|
||||
default-state = "off";
|
||||
linux,default-trigger = "heartbeat";
|
||||
};
|
||||
|
||||
eMMC {
|
||||
label = "green:eMMC";
|
||||
gpios = <&gpb2 1 0>;
|
||||
default-state = "off";
|
||||
linux,default-trigger = "mmc0";
|
||||
};
|
||||
|
||||
microSD {
|
||||
label = "red:microSD";
|
||||
gpios = <&gpx2 3 0>;
|
||||
default-state = "off";
|
||||
linux,default-trigger = "mmc1";
|
||||
};
|
||||
};
|
||||
|
||||
sound: sound {
|
||||
compatible = "simple-audio-card";
|
||||
|
||||
simple-audio-card,name = "Odroid-XU3";
|
||||
simple-audio-card,widgets =
|
||||
"Headphone", "Headphone Jack",
|
||||
"Speakers", "Speakers";
|
||||
simple-audio-card,routing =
|
||||
"Headphone Jack", "HPL",
|
||||
"Headphone Jack", "HPR",
|
||||
"Headphone Jack", "MICBIAS",
|
||||
"IN1", "Headphone Jack",
|
||||
"Speakers", "SPKL",
|
||||
"Speakers", "SPKR";
|
||||
|
||||
simple-audio-card,format = "i2s";
|
||||
simple-audio-card,bitclock-master = <&link0_codec>;
|
||||
simple-audio-card,frame-master = <&link0_codec>;
|
||||
|
||||
simple-audio-card,cpu {
|
||||
sound-dai = <&i2s0 0>;
|
||||
system-clock-frequency = <19200000>;
|
||||
};
|
||||
|
||||
link0_codec: simple-audio-card,codec {
|
||||
sound-dai = <&max98090>;
|
||||
clocks = <&i2s0 CLK_I2S_CDCLK>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&clock_audss {
|
||||
assigned-clocks = <&clock_audss EXYNOS_MOUT_AUDSS>,
|
||||
<&clock_audss EXYNOS_MOUT_I2S>,
|
||||
<&clock_audss EXYNOS_DOUT_AUD_BUS>;
|
||||
assigned-clock-parents = <&clock CLK_FIN_PLL>,
|
||||
<&clock_audss EXYNOS_MOUT_AUDSS>;
|
||||
assigned-clock-rates = <0>,
|
||||
<0>,
|
||||
<19200000>;
|
||||
};
|
||||
|
||||
&hsi2c_5 {
|
||||
status = "okay";
|
||||
max98090: max98090@10 {
|
||||
compatible = "maxim,max98090";
|
||||
reg = <0x10>;
|
||||
interrupt-parent = <&gpx3>;
|
||||
interrupts = <2 0>;
|
||||
clocks = <&i2s0 CLK_I2S_CDCLK>;
|
||||
clock-names = "mclk";
|
||||
#sound-dai-cells = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2s0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&hdmi {
|
||||
@ -306,15 +387,19 @@ &mfc {
|
||||
&mmc_0 {
|
||||
status = "okay";
|
||||
mmc-pwrseq = <&emmc_pwrseq>;
|
||||
broken-cd;
|
||||
cd-gpios = <&gpc0 2 GPIO_ACTIVE_LOW>;
|
||||
card-detect-delay = <200>;
|
||||
samsung,dw-mshc-ciu-div = <3>;
|
||||
samsung,dw-mshc-sdr-timing = <0 4>;
|
||||
samsung,dw-mshc-ddr-timing = <0 2>;
|
||||
samsung,dw-mshc-hs400-timing = <0 2>;
|
||||
samsung,read-strobe-delay = <90>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus1 &sd0_bus4 &sd0_bus8>;
|
||||
pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus1 &sd0_bus4 &sd0_bus8 &sd0_cd &sd0_rclk>;
|
||||
bus-width = <8>;
|
||||
cap-mmc-highspeed;
|
||||
mmc-hs200-1_8v;
|
||||
mmc-hs400-1_8v;
|
||||
};
|
||||
|
||||
&mmc_2 {
|
||||
@ -386,3 +471,9 @@ ina231@45 {
|
||||
shunt-resistor = <10000>;
|
||||
};
|
||||
};
|
||||
|
||||
&rtc {
|
||||
status = "okay";
|
||||
clocks = <&clock CLK_RTC>, <&s2mps11_osc S2MPS11_CLK_AP>;
|
||||
clock-names = "rtc", "rtc_src";
|
||||
};
|
||||
|
||||
23
include/dt-bindings/clock/samsung,s2mps11.h
Normal file
23
include/dt-bindings/clock/samsung,s2mps11.h
Normal file
@ -0,0 +1,23 @@
|
||||
/*
|
||||
* Copyright (C) 2015 Markus Reichl
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* Device Tree binding constants clocks for the Samsung S2MPS11 PMIC.
|
||||
*/
|
||||
|
||||
#ifndef _DT_BINDINGS_CLOCK_SAMSUNG_S2MPS11_CLOCK_H
|
||||
#define _DT_BINDINGS_CLOCK_SAMSUNG_S2MPS11_CLOCK_H
|
||||
|
||||
/* Fixed rate clocks. */
|
||||
|
||||
#define S2MPS11_CLK_AP 0
|
||||
#define S2MPS11_CLK_CP 1
|
||||
#define S2MPS11_CLK_BT 2
|
||||
|
||||
/* Total number of clocks. */
|
||||
#define S2MPS11_CLKS_NUM (S2MPS11_CLK_BT + 1)
|
||||
|
||||
#endif /* _DT_BINDINGS_CLOCK_SAMSUNG_S2MPS11_CLOCK_H */
|
||||
Loading…
Reference in New Issue
Block a user