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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-24 02:00:54 +07:00
block: move queues types to the block layer
Having another indirect all in the fast path doesn't really help in our post-spectre world. Also having too many queue type is just going to create confusion, so I'd rather manage them centrally. Note that the queue type naming and ordering changes a bit - the first index now is the default queue for everything not explicitly marked, the optional ones are read and poll queues. Reviewed-by: Sagi Grimberg <sagi@grimberg.me> Signed-off-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Jens Axboe <axboe@kernel.dk>
This commit is contained in:
Christoph Hellwig
Jens Axboe
parent
154989e45f
commit
e20ba6e1da
@ -173,9 +173,16 @@ static ssize_t blk_mq_hw_sysfs_cpus_show(struct blk_mq_hw_ctx *hctx, char *page)
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return ret;
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}
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static const char *const hctx_types[] = {
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[HCTX_TYPE_DEFAULT] = "default",
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[HCTX_TYPE_READ] = "read",
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[HCTX_TYPE_POLL] = "poll",
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};
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static ssize_t blk_mq_hw_sysfs_type_show(struct blk_mq_hw_ctx *hctx, char *page)
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{
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return sprintf(page, "%u\n", hctx->type);
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BUILD_BUG_ON(ARRAY_SIZE(hctx_types) != HCTX_MAX_TYPES);
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return sprintf(page, "%s\n", hctx_types[hctx->type]);
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}
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static struct attribute *default_ctx_attrs[] = {
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@ -81,16 +81,14 @@ extern int blk_mq_hw_queue_to_node(struct blk_mq_queue_map *qmap, unsigned int);
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/*
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* blk_mq_map_queue_type() - map (hctx_type,cpu) to hardware queue
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* @q: request queue
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* @hctx_type: the hctx type index
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* @type: the hctx type index
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* @cpu: CPU
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*/
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static inline struct blk_mq_hw_ctx *blk_mq_map_queue_type(struct request_queue *q,
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unsigned int hctx_type,
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enum hctx_type type,
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unsigned int cpu)
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{
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struct blk_mq_tag_set *set = q->tag_set;
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return q->queue_hw_ctx[set->map[hctx_type].mq_map[cpu]];
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return q->queue_hw_ctx[q->tag_set->map[type].mq_map[cpu]];
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}
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/*
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@ -103,12 +101,17 @@ static inline struct blk_mq_hw_ctx *blk_mq_map_queue(struct request_queue *q,
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unsigned int flags,
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unsigned int cpu)
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{
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int hctx_type = 0;
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enum hctx_type type = HCTX_TYPE_DEFAULT;
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if (q->mq_ops->rq_flags_to_type)
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hctx_type = q->mq_ops->rq_flags_to_type(q, flags);
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if (q->tag_set->nr_maps > HCTX_TYPE_POLL &&
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((flags & REQ_HIPRI) && test_bit(QUEUE_FLAG_POLL, &q->queue_flags)))
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type = HCTX_TYPE_POLL;
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return blk_mq_map_queue_type(q, hctx_type, cpu);
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else if (q->tag_set->nr_maps > HCTX_TYPE_READ &&
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((flags & REQ_OP_MASK) == REQ_OP_READ))
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type = HCTX_TYPE_READ;
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return blk_mq_map_queue_type(q, type, cpu);
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}
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/*
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@ -95,13 +95,6 @@ struct nvme_queue;
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static void nvme_dev_disable(struct nvme_dev *dev, bool shutdown);
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enum {
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NVMEQ_TYPE_READ,
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NVMEQ_TYPE_WRITE,
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NVMEQ_TYPE_POLL,
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NVMEQ_TYPE_NR,
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};
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/*
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* Represents an NVM Express device. Each nvme_dev is a PCI function.
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*/
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@ -115,7 +108,7 @@ struct nvme_dev {
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struct dma_pool *prp_small_pool;
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unsigned online_queues;
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unsigned max_qid;
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unsigned io_queues[NVMEQ_TYPE_NR];
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unsigned io_queues[HCTX_MAX_TYPES];
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unsigned int num_vecs;
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int q_depth;
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u32 db_stride;
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@ -499,10 +492,10 @@ static int nvme_pci_map_queues(struct blk_mq_tag_set *set)
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map->nr_queues = dev->io_queues[i];
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if (!map->nr_queues) {
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BUG_ON(i == NVMEQ_TYPE_READ);
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BUG_ON(i == HCTX_TYPE_DEFAULT);
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/* shared set, resuse read set parameters */
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map->nr_queues = dev->io_queues[NVMEQ_TYPE_READ];
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map->nr_queues = dev->io_queues[HCTX_TYPE_DEFAULT];
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qoff = 0;
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offset = queue_irq_offset(dev);
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}
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@ -512,7 +505,7 @@ static int nvme_pci_map_queues(struct blk_mq_tag_set *set)
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* affinity), so use the regular blk-mq cpu mapping
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*/
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map->queue_offset = qoff;
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if (i != NVMEQ_TYPE_POLL)
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if (i != HCTX_TYPE_POLL)
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blk_mq_pci_map_queues(map, to_pci_dev(dev->dev), offset);
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else
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blk_mq_map_queues(map);
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@ -961,16 +954,6 @@ static blk_status_t nvme_queue_rq(struct blk_mq_hw_ctx *hctx,
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return ret;
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}
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static int nvme_rq_flags_to_type(struct request_queue *q, unsigned int flags)
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{
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if ((flags & REQ_HIPRI) && test_bit(QUEUE_FLAG_POLL, &q->queue_flags))
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return NVMEQ_TYPE_POLL;
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if ((flags & REQ_OP_MASK) == REQ_OP_READ)
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return NVMEQ_TYPE_READ;
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return NVMEQ_TYPE_WRITE;
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}
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static void nvme_pci_complete_rq(struct request *req)
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{
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struct nvme_iod *iod = blk_mq_rq_to_pdu(req);
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@ -1634,7 +1617,6 @@ static const struct blk_mq_ops nvme_mq_admin_ops = {
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#define NVME_SHARED_MQ_OPS \
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.queue_rq = nvme_queue_rq, \
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.commit_rqs = nvme_commit_rqs, \
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.rq_flags_to_type = nvme_rq_flags_to_type, \
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.complete = nvme_pci_complete_rq, \
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.init_hctx = nvme_init_hctx, \
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.init_request = nvme_init_request, \
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@ -1785,9 +1767,9 @@ static int nvme_create_io_queues(struct nvme_dev *dev)
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}
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max = min(dev->max_qid, dev->ctrl.queue_count - 1);
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if (max != 1 && dev->io_queues[NVMEQ_TYPE_POLL]) {
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rw_queues = dev->io_queues[NVMEQ_TYPE_READ] +
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dev->io_queues[NVMEQ_TYPE_WRITE];
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if (max != 1 && dev->io_queues[HCTX_TYPE_POLL]) {
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rw_queues = dev->io_queues[HCTX_TYPE_DEFAULT] +
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dev->io_queues[HCTX_TYPE_READ];
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} else {
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rw_queues = max;
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}
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@ -2076,9 +2058,9 @@ static void nvme_calc_io_queues(struct nvme_dev *dev, unsigned int nr_io_queues)
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* Setup read/write queue split
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*/
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if (nr_io_queues == 1) {
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dev->io_queues[NVMEQ_TYPE_READ] = 1;
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dev->io_queues[NVMEQ_TYPE_WRITE] = 0;
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dev->io_queues[NVMEQ_TYPE_POLL] = 0;
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dev->io_queues[HCTX_TYPE_DEFAULT] = 1;
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dev->io_queues[HCTX_TYPE_READ] = 0;
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dev->io_queues[HCTX_TYPE_POLL] = 0;
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return;
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}
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@ -2095,10 +2077,10 @@ static void nvme_calc_io_queues(struct nvme_dev *dev, unsigned int nr_io_queues)
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this_p_queues = nr_io_queues - 1;
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}
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dev->io_queues[NVMEQ_TYPE_POLL] = this_p_queues;
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dev->io_queues[HCTX_TYPE_POLL] = this_p_queues;
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nr_io_queues -= this_p_queues;
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} else
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dev->io_queues[NVMEQ_TYPE_POLL] = 0;
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dev->io_queues[HCTX_TYPE_POLL] = 0;
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/*
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* If 'write_queues' is set, ensure it leaves room for at least
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@ -2112,11 +2094,11 @@ static void nvme_calc_io_queues(struct nvme_dev *dev, unsigned int nr_io_queues)
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* a queue set.
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*/
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if (!this_w_queues) {
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dev->io_queues[NVMEQ_TYPE_WRITE] = 0;
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dev->io_queues[NVMEQ_TYPE_READ] = nr_io_queues;
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dev->io_queues[HCTX_TYPE_DEFAULT] = nr_io_queues;
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dev->io_queues[HCTX_TYPE_READ] = 0;
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} else {
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dev->io_queues[NVMEQ_TYPE_WRITE] = this_w_queues;
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dev->io_queues[NVMEQ_TYPE_READ] = nr_io_queues - this_w_queues;
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dev->io_queues[HCTX_TYPE_DEFAULT] = this_w_queues;
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dev->io_queues[HCTX_TYPE_READ] = nr_io_queues - this_w_queues;
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}
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}
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@ -2138,8 +2120,8 @@ static int nvme_setup_irqs(struct nvme_dev *dev, int nr_io_queues)
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*/
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do {
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nvme_calc_io_queues(dev, nr_io_queues);
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irq_sets[0] = dev->io_queues[NVMEQ_TYPE_READ];
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irq_sets[1] = dev->io_queues[NVMEQ_TYPE_WRITE];
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irq_sets[0] = dev->io_queues[HCTX_TYPE_DEFAULT];
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irq_sets[1] = dev->io_queues[HCTX_TYPE_READ];
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if (!irq_sets[1])
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affd.nr_sets = 1;
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@ -2226,12 +2208,12 @@ static int nvme_setup_io_queues(struct nvme_dev *dev)
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dev->num_vecs = result;
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result = max(result - 1, 1);
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dev->max_qid = result + dev->io_queues[NVMEQ_TYPE_POLL];
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dev->max_qid = result + dev->io_queues[HCTX_TYPE_POLL];
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dev_info(dev->ctrl.device, "%d/%d/%d read/write/poll queues\n",
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dev->io_queues[NVMEQ_TYPE_READ],
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dev->io_queues[NVMEQ_TYPE_WRITE],
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dev->io_queues[NVMEQ_TYPE_POLL]);
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dev_info(dev->ctrl.device, "%d/%d/%d default/read/poll queues\n",
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dev->io_queues[HCTX_TYPE_DEFAULT],
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dev->io_queues[HCTX_TYPE_READ],
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dev->io_queues[HCTX_TYPE_POLL]);
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/*
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* Should investigate if there's a performance win from allocating
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@ -2332,13 +2314,13 @@ static int nvme_dev_add(struct nvme_dev *dev)
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int ret;
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if (!dev->ctrl.tagset) {
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if (!dev->io_queues[NVMEQ_TYPE_POLL])
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if (!dev->io_queues[HCTX_TYPE_POLL])
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dev->tagset.ops = &nvme_mq_ops;
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else
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dev->tagset.ops = &nvme_mq_poll_noirq_ops;
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dev->tagset.nr_hw_queues = dev->online_queues - 1;
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dev->tagset.nr_maps = NVMEQ_TYPE_NR;
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dev->tagset.nr_maps = HCTX_MAX_TYPES;
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dev->tagset.timeout = NVME_IO_TIMEOUT;
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dev->tagset.numa_node = dev_to_node(dev->dev);
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dev->tagset.queue_depth =
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@ -81,8 +81,12 @@ struct blk_mq_queue_map {
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unsigned int queue_offset;
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};
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enum {
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HCTX_MAX_TYPES = 3,
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enum hctx_type {
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HCTX_TYPE_DEFAULT, /* all I/O not otherwise accounted for */
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HCTX_TYPE_READ, /* just for READ I/O */
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HCTX_TYPE_POLL, /* polled I/O of any kind */
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HCTX_MAX_TYPES,
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};
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struct blk_mq_tag_set {
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@ -118,8 +122,6 @@ struct blk_mq_queue_data {
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typedef blk_status_t (queue_rq_fn)(struct blk_mq_hw_ctx *,
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const struct blk_mq_queue_data *);
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typedef void (commit_rqs_fn)(struct blk_mq_hw_ctx *);
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/* takes rq->cmd_flags as input, returns a hardware type index */
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typedef int (rq_flags_to_type_fn)(struct request_queue *, unsigned int);
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typedef bool (get_budget_fn)(struct blk_mq_hw_ctx *);
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typedef void (put_budget_fn)(struct blk_mq_hw_ctx *);
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typedef enum blk_eh_timer_return (timeout_fn)(struct request *, bool);
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@ -154,11 +156,6 @@ struct blk_mq_ops {
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*/
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commit_rqs_fn *commit_rqs;
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/*
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* Return a queue map type for the given request/bio flags
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*/
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rq_flags_to_type_fn *rq_flags_to_type;
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/*
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* Reserve budget before queue request, once .queue_rq is
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* run, it is driver's responsibility to release the
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