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First set of IIO fixes in the 4.15 cycle.

Browse Source 
* kernel-doc
   - fix a build error from symbols ending in _ by making them _*
 * cpcap
   - Fix wrong handling of platform_get_irq_by_name which can return a
     postive value on success.
 * max30102
   - ABI says temperature should bein milli Celsius after scaling. Here it
     was in Celsius.
 * meson-saradc:
   - for Meson8/8b the gate clock bit was wrongly selected due to ffs/fls fun.
   - bandgap was not initialized properly on older socs.  Mostly got away
     with this because the bootloader was doing it for us.
   - Meson8/8b don't have some registers in the general regmap config. Give
     them their own ones.
 * stm32-lptimer/stm32-adc trigger
   - Fix a link error when optional stm32-lptimer driver isn't built.
 * sx9500
   - we recently removed explict handling of ACPI provided gpio interrupts
     as the core i2c acpi code started providing them directly.  Unfortuantely
     there are ACPI tables out there that use GpioIO resources and it doesn't
     know to map those as interrupts.  As such partial revert the removal
     of this handling from the driver.
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Merge tag 'iio-fixes-for-4.15a' of git://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio into staging-linus

Jonathan writes:

First set of IIO fixes in the 4.15 cycle.

* kernel-doc
  - fix a build error from symbols ending in _ by making them _*
* cpcap
  - Fix wrong handling of platform_get_irq_by_name which can return a
    postive value on success.
* max30102
  - ABI says temperature should bein milli Celsius after scaling. Here it
    was in Celsius.
* meson-saradc:
  - for Meson8/8b the gate clock bit was wrongly selected due to ffs/fls fun.
  - bandgap was not initialized properly on older socs.  Mostly got away
    with this because the bootloader was doing it for us.
  - Meson8/8b don't have some registers in the general regmap config. Give
    them their own ones.
* stm32-lptimer/stm32-adc trigger
  - Fix a link error when optional stm32-lptimer driver isn't built.
* sx9500
  - we recently removed explict handling of ACPI provided gpio interrupts
    as the core i2c acpi code started providing them directly.  Unfortuantely
    there are ACPI tables out there that use GpioIO resources and it doesn't
    know to map those as interrupts.  As such partial revert the removal
    of this handling from the driver.
This commit is contained in:
Greg Kroah-Hartman 2017-12-03 16:04:38 +01:00
commit e168e9845d
6 changed files with 59 additions and 15 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
drivers/iio/adc/cpcap-adc.c
View File

@ -1011,7 +1011,7 @@ static int cpcap_adc_probe(struct platform_device *pdev)
platform_set_drvdata(pdev, indio_dev);
ddata->irq = platform_get_irq_byname(pdev, "adcdone");
if (!ddata->irq)
if (ddata->irq < 0)
return -ENODEV;
error = devm_request_threaded_irq(&pdev->dev, ddata->irq, NULL,

52
drivers/iio/adc/meson_saradc.c
View File

@ -221,8 +221,10 @@ enum meson_sar_adc_chan7_mux_sel {
struct meson_sar_adc_data {
bool has_bl30_integration;
u32 bandgap_reg;
unsigned int resolution;
const char *name;
const struct regmap_config *regmap_config;
};
struct meson_sar_adc_priv {
@ -242,13 +244,20 @@ struct meson_sar_adc_priv {
int calibscale;
};
static const struct regmap_config meson_sar_adc_regmap_config = {
static const struct regmap_config meson_sar_adc_regmap_config_gxbb = {
.reg_bits = 8,
.val_bits = 32,
.reg_stride = 4,
.max_register = MESON_SAR_ADC_REG13,
};
static const struct regmap_config meson_sar_adc_regmap_config_meson8 = {
.reg_bits = 8,
.val_bits = 32,
.reg_stride = 4,
.max_register = MESON_SAR_ADC_DELTA_10,
};
static unsigned int meson_sar_adc_get_fifo_count(struct iio_dev *indio_dev)
{
struct meson_sar_adc_priv *priv = iio_priv(indio_dev);
@ -600,7 +609,7 @@ static int meson_sar_adc_clk_init(struct iio_dev *indio_dev,
init.num_parents = 1;
priv->clk_gate.reg = base + MESON_SAR_ADC_REG3;
priv->clk_gate.bit_idx = fls(MESON_SAR_ADC_REG3_CLK_EN);
priv->clk_gate.bit_idx = __ffs(MESON_SAR_ADC_REG3_CLK_EN);
priv->clk_gate.hw.init = &init;
priv->adc_clk = devm_clk_register(&indio_dev->dev, &priv->clk_gate.hw);
@ -685,6 +694,20 @@ static int meson_sar_adc_init(struct iio_dev *indio_dev)
return 0;
}
static void meson_sar_adc_set_bandgap(struct iio_dev *indio_dev, bool on_off)
{
struct meson_sar_adc_priv *priv = iio_priv(indio_dev);
u32 enable_mask;
if (priv->data->bandgap_reg == MESON_SAR_ADC_REG11)
enable_mask = MESON_SAR_ADC_REG11_BANDGAP_EN;
else
enable_mask = MESON_SAR_ADC_DELTA_10_TS_VBG_EN;
regmap_update_bits(priv->regmap, priv->data->bandgap_reg, enable_mask,
on_off ? enable_mask : 0);
}
static int meson_sar_adc_hw_enable(struct iio_dev *indio_dev)
{
struct meson_sar_adc_priv *priv = iio_priv(indio_dev);
@ -717,9 +740,9 @@ static int meson_sar_adc_hw_enable(struct iio_dev *indio_dev)
regval = FIELD_PREP(MESON_SAR_ADC_REG0_FIFO_CNT_IRQ_MASK, 1);
regmap_update_bits(priv->regmap, MESON_SAR_ADC_REG0,
MESON_SAR_ADC_REG0_FIFO_CNT_IRQ_MASK, regval);
regmap_update_bits(priv->regmap, MESON_SAR_ADC_REG11,
MESON_SAR_ADC_REG11_BANDGAP_EN,
MESON_SAR_ADC_REG11_BANDGAP_EN);
meson_sar_adc_set_bandgap(indio_dev, true);
regmap_update_bits(priv->regmap, MESON_SAR_ADC_REG3,
MESON_SAR_ADC_REG3_ADC_EN,
MESON_SAR_ADC_REG3_ADC_EN);
@ -739,8 +762,7 @@ static int meson_sar_adc_hw_enable(struct iio_dev *indio_dev)
err_adc_clk:
regmap_update_bits(priv->regmap, MESON_SAR_ADC_REG3,
MESON_SAR_ADC_REG3_ADC_EN, 0);
regmap_update_bits(priv->regmap, MESON_SAR_ADC_REG11,
MESON_SAR_ADC_REG11_BANDGAP_EN, 0);
meson_sar_adc_set_bandgap(indio_dev, false);
clk_disable_unprepare(priv->sana_clk);
err_sana_clk:
clk_disable_unprepare(priv->core_clk);
@ -765,8 +787,8 @@ static int meson_sar_adc_hw_disable(struct iio_dev *indio_dev)
regmap_update_bits(priv->regmap, MESON_SAR_ADC_REG3,
MESON_SAR_ADC_REG3_ADC_EN, 0);
regmap_update_bits(priv->regmap, MESON_SAR_ADC_REG11,
MESON_SAR_ADC_REG11_BANDGAP_EN, 0);
meson_sar_adc_set_bandgap(indio_dev, false);
clk_disable_unprepare(priv->sana_clk);
clk_disable_unprepare(priv->core_clk);
@ -844,30 +866,40 @@ static const struct iio_info meson_sar_adc_iio_info = {
static const struct meson_sar_adc_data meson_sar_adc_meson8_data = {
.has_bl30_integration = false,
.bandgap_reg = MESON_SAR_ADC_DELTA_10,
.regmap_config = &meson_sar_adc_regmap_config_meson8,
.resolution = 10,
.name = "meson-meson8-saradc",
};
static const struct meson_sar_adc_data meson_sar_adc_meson8b_data = {
.has_bl30_integration = false,
.bandgap_reg = MESON_SAR_ADC_DELTA_10,
.regmap_config = &meson_sar_adc_regmap_config_meson8,
.resolution = 10,
.name = "meson-meson8b-saradc",
};
static const struct meson_sar_adc_data meson_sar_adc_gxbb_data = {
.has_bl30_integration = true,
.bandgap_reg = MESON_SAR_ADC_REG11,
.regmap_config = &meson_sar_adc_regmap_config_gxbb,
.resolution = 10,
.name = "meson-gxbb-saradc",
};
static const struct meson_sar_adc_data meson_sar_adc_gxl_data = {
.has_bl30_integration = true,
.bandgap_reg = MESON_SAR_ADC_REG11,
.regmap_config = &meson_sar_adc_regmap_config_gxbb,
.resolution = 12,
.name = "meson-gxl-saradc",
};
static const struct meson_sar_adc_data meson_sar_adc_gxm_data = {
.has_bl30_integration = true,
.bandgap_reg = MESON_SAR_ADC_REG11,
.regmap_config = &meson_sar_adc_regmap_config_gxbb,
.resolution = 12,
.name = "meson-gxm-saradc",
};
@ -945,7 +977,7 @@ static int meson_sar_adc_probe(struct platform_device *pdev)
return ret;
priv->regmap = devm_regmap_init_mmio(&pdev->dev, base,
&meson_sar_adc_regmap_config);
priv->data->regmap_config);
if (IS_ERR(priv->regmap))
return PTR_ERR(priv->regmap);

2
drivers/iio/health/max30102.c
View File

@ -371,7 +371,7 @@ static int max30102_read_raw(struct iio_dev *indio_dev,
mutex_unlock(&indio_dev->mlock);
break;
case IIO_CHAN_INFO_SCALE:
*val = 1; /* 0.0625 */
*val = 1000; /* 62.5 */
*val2 = 16;
ret = IIO_VAL_FRACTIONAL;
break;

4
drivers/iio/industrialio-core.c
View File

@ -631,7 +631,7 @@ static ssize_t __iio_format_value(char *buf, size_t len, unsigned int type,
* iio_format_value() - Formats a IIO value into its string representation
* @buf: The buffer to which the formatted value gets written
* which is assumed to be big enough (i.e. PAGE_SIZE).
* @type: One of the IIO_VAL_... constants. This decides how the val
* @type: One of the IIO_VAL_* constants. This decides how the val
* and val2 parameters are formatted.
* @size: Number of IIO value entries contained in vals
* @vals: Pointer to the values, exact meaning depends on the
@ -639,7 +639,7 @@ static ssize_t __iio_format_value(char *buf, size_t len, unsigned int type,
*
* Return: 0 by default, a negative number on failure or the
* total number of characters written for a type that belongs
* to the IIO_VAL_... constant.
* to the IIO_VAL_* constant.
*/
ssize_t iio_format_value(char *buf, unsigned int type, int size, int *vals)
{

9
drivers/iio/proximity/sx9500.c
View File

@ -869,6 +869,7 @@ static int sx9500_init_device(struct iio_dev *indio_dev)
static void sx9500_gpio_probe(struct i2c_client *client,
struct sx9500_data *data)
{
struct gpio_desc *gpiod_int;
struct device *dev;
if (!client)
@ -876,6 +877,14 @@ static void sx9500_gpio_probe(struct i2c_client *client,
dev = &client->dev;
if (client->irq <= 0) {
gpiod_int = devm_gpiod_get(dev, SX9500_GPIO_INT, GPIOD_IN);
if (IS_ERR(gpiod_int))
dev_err(dev, "gpio get irq failed\n");
else
client->irq = gpiod_to_irq(gpiod_int);
}
data->gpiod_rst = devm_gpiod_get(dev, SX9500_GPIO_RESET, GPIOD_OUT_HIGH);
if (IS_ERR(data->gpiod_rst)) {
dev_warn(dev, "gpio get reset pin failed\n");

5
include/linux/iio/timer/stm32-lptim-trigger.h
View File

@ -16,11 +16,14 @@
#define LPTIM2_OUT "lptim2_out"
#define LPTIM3_OUT "lptim3_out"
#if IS_ENABLED(CONFIG_IIO_STM32_LPTIMER_TRIGGER)
#if IS_REACHABLE(CONFIG_IIO_STM32_LPTIMER_TRIGGER)
bool is_stm32_lptim_trigger(struct iio_trigger *trig);
#else
static inline bool is_stm32_lptim_trigger(struct iio_trigger *trig)
{
#if IS_ENABLED(CONFIG_IIO_STM32_LPTIMER_TRIGGER)
pr_warn_once("stm32 lptim_trigger not linked in\n");
#endif
return false;
}
#endif