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i40e/i40evf: Update RSS configuration
This patch changes the RSS configuration to set table size and write to hardware to confirm RSS table size being used. Change-ID: I455a4c09c9dd479f5791ee1f09fdc83ff9908df5 Signed-off-by: Carolyn Wyborny <carolyn.wyborny@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
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@ -350,6 +350,7 @@ struct i40e_pf {
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u32 rx_hwtstamp_cleared;
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bool ptp_tx;
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bool ptp_rx;
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u16 rss_table_size;
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};
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struct i40e_mac_filter {
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@ -1839,7 +1839,6 @@ static void i40e_parse_discover_capabilities(struct i40e_hw *hw, void *buff,
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struct i40e_aqc_list_capabilities_element_resp *cap;
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u32 number, logical_id, phys_id;
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struct i40e_hw_capabilities *p;
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u32 reg_val;
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u32 i = 0;
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u16 id;
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@ -1910,11 +1909,7 @@ static void i40e_parse_discover_capabilities(struct i40e_hw *hw, void *buff,
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break;
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case I40E_DEV_FUNC_CAP_RSS:
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p->rss = true;
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reg_val = rd32(hw, I40E_PFQF_CTL_0);
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if (reg_val & I40E_PFQF_CTL_0_HASHLUTSIZE_MASK)
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p->rss_table_size = number;
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else
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p->rss_table_size = 128;
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p->rss_table_size = number;
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p->rss_table_entry_width = logical_id;
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break;
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case I40E_DEV_FUNC_CAP_RX_QUEUES:
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@ -6599,6 +6599,7 @@ static int i40e_config_rss(struct i40e_pf *pf)
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u32 lut = 0;
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int i, j;
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u64 hena;
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u32 reg_val;
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/* Fill out hash function seed */
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for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++)
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@ -6611,8 +6612,19 @@ static int i40e_config_rss(struct i40e_pf *pf)
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wr32(hw, I40E_PFQF_HENA(0), (u32)hena);
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wr32(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32));
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/* Check capability and Set table size and register per hw expectation*/
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reg_val = rd32(hw, I40E_PFQF_CTL_0);
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if (hw->func_caps.rss_table_size == 512) {
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reg_val |= I40E_PFQF_CTL_0_HASHLUTSIZE_512;
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pf->rss_table_size = 512;
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} else {
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pf->rss_table_size = 128;
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reg_val &= ~I40E_PFQF_CTL_0_HASHLUTSIZE_512;
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}
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wr32(hw, I40E_PFQF_CTL_0, reg_val);
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/* Populate the LUT with max no. of queues in round robin fashion */
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for (i = 0, j = 0; i < pf->hw.func_caps.rss_table_size; i++, j++) {
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for (i = 0, j = 0; i < pf->rss_table_size; i++, j++) {
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/* The assumption is that lan qp count will be the highest
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* qp count for any PF VSI that needs RSS.
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@ -1165,4 +1165,7 @@ enum i40e_reset_type {
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I40E_RESET_GLOBR = 2,
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I40E_RESET_EMPR = 3,
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};
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/* RSS Hash Table Size */
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#define I40E_PFQF_CTL_0_HASHLUTSIZE_512 0x00010000
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#endif /* _I40E_TYPE_H_ */
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@ -1165,4 +1165,7 @@ enum i40e_reset_type {
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I40E_RESET_GLOBR = 2,
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I40E_RESET_EMPR = 3,
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};
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/* RSS Hash Table Size */
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#define I40E_PFQF_CTL_0_HASHLUTSIZE_512 0x00010000
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#endif /* _I40E_TYPE_H_ */
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