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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-24 04:50:53 +07:00
Merge branch 'pm-cpufreq-arm' into pm-cpufreq
* pm-cpufreq-arm: cpufreq: tegra: call CPUFREQ_POSTCHANGE notfier in error cases cpufreq: s3c64xx: call CPUFREQ_POSTCHANGE notfier in error cases cpufreq: omap: call CPUFREQ_POSTCHANGE notfier in error cases cpufreq: imx6q: call CPUFREQ_POSTCHANGE notfier in error cases cpufreq: exynos: call CPUFREQ_POSTCHANGE notfier in error cases cpufreq: dbx500: call CPUFREQ_POSTCHANGE notfier in error cases cpufreq: davinci: call CPUFREQ_POSTCHANGE notfier in error cases cpufreq: arm-big-little: call CPUFREQ_POSTCHANGE notfier in error cases cpufreq: s3c2416: fix forgotten driver_data conversions
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commit
e11158c0c9
@ -84,11 +84,9 @@ static int bL_cpufreq_set_target(struct cpufreq_policy *policy,
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ret = clk_set_rate(clk[cur_cluster], freqs.new * 1000);
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if (ret) {
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pr_err("clk_set_rate failed: %d\n", ret);
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return ret;
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freqs.new = freqs.old;
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}
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policy->cur = freqs.new;
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cpufreq_notify_transition(policy, &freqs, CPUFREQ_POSTCHANGE);
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return ret;
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@ -114,6 +114,9 @@ static int davinci_target(struct cpufreq_policy *policy,
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pdata->set_voltage(idx);
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out:
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if (ret)
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freqs.new = freqs.old;
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cpufreq_notify_transition(policy, &freqs, CPUFREQ_POSTCHANGE);
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return ret;
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@ -57,13 +57,13 @@ static int dbx500_cpufreq_target(struct cpufreq_policy *policy,
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if (ret) {
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pr_err("dbx500-cpufreq: Failed to set armss_clk to %d Hz: error %d\n",
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freqs.new * 1000, ret);
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return ret;
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freqs.new = freqs.old;
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}
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/* post change notification */
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cpufreq_notify_transition(policy, &freqs, CPUFREQ_POSTCHANGE);
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return 0;
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return ret;
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}
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static unsigned int dbx500_cpufreq_getspeed(unsigned int cpu)
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@ -113,7 +113,8 @@ static int exynos_cpufreq_scale(unsigned int target_freq)
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if (ret) {
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pr_err("%s: failed to set cpu voltage to %d\n",
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__func__, arm_volt);
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goto out;
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freqs.new = freqs.old;
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goto post_notify;
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}
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}
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@ -123,14 +124,19 @@ static int exynos_cpufreq_scale(unsigned int target_freq)
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if (ret) {
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pr_err("%s: failed to set cpu voltage to %d\n",
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__func__, safe_arm_volt);
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goto out;
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freqs.new = freqs.old;
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goto post_notify;
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}
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}
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exynos_info->set_freq(old_index, index);
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post_notify:
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cpufreq_notify_transition(policy, &freqs, CPUFREQ_POSTCHANGE);
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if (ret)
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goto out;
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/* When the new frequency is lower than current frequency */
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if ((freqs.new < freqs.old) ||
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((freqs.new > freqs.old) && safe_arm_volt)) {
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@ -68,8 +68,6 @@ static int imx6q_set_target(struct cpufreq_policy *policy,
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if (freqs.old == freqs.new)
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return 0;
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cpufreq_notify_transition(policy, &freqs, CPUFREQ_PRECHANGE);
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rcu_read_lock();
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opp = opp_find_freq_ceil(cpu_dev, &freq_hz);
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if (IS_ERR(opp)) {
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@ -86,13 +84,16 @@ static int imx6q_set_target(struct cpufreq_policy *policy,
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freqs.old / 1000, volt_old / 1000,
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freqs.new / 1000, volt / 1000);
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cpufreq_notify_transition(policy, &freqs, CPUFREQ_PRECHANGE);
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/* scaling up? scale voltage before frequency */
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if (freqs.new > freqs.old) {
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ret = regulator_set_voltage_tol(arm_reg, volt, 0);
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if (ret) {
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dev_err(cpu_dev,
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"failed to scale vddarm up: %d\n", ret);
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return ret;
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freqs.new = freqs.old;
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goto post_notify;
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}
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/*
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@ -145,15 +146,18 @@ static int imx6q_set_target(struct cpufreq_policy *policy,
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if (ret) {
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dev_err(cpu_dev, "failed to set clock rate: %d\n", ret);
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regulator_set_voltage_tol(arm_reg, volt_old, 0);
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return ret;
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freqs.new = freqs.old;
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goto post_notify;
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}
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/* scaling down? scale voltage after frequency */
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if (freqs.new < freqs.old) {
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ret = regulator_set_voltage_tol(arm_reg, volt, 0);
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if (ret)
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if (ret) {
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dev_warn(cpu_dev,
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"failed to scale vddarm down: %d\n", ret);
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ret = 0;
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}
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if (freqs.old == FREQ_1P2_GHZ / 1000) {
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regulator_set_voltage_tol(pu_reg,
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@ -163,9 +167,10 @@ static int imx6q_set_target(struct cpufreq_policy *policy,
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}
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}
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post_notify:
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cpufreq_notify_transition(policy, &freqs, CPUFREQ_POSTCHANGE);
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return 0;
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return ret;
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}
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static int imx6q_cpufreq_init(struct cpufreq_policy *policy)
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@ -93,9 +93,6 @@ static int omap_target(struct cpufreq_policy *policy,
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if (freqs.old == freqs.new && policy->cur == freqs.new)
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return ret;
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/* notifiers */
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cpufreq_notify_transition(policy, &freqs, CPUFREQ_PRECHANGE);
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freq = freqs.new * 1000;
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ret = clk_round_rate(mpu_clk, freq);
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if (IS_ERR_VALUE(ret)) {
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@ -125,6 +122,9 @@ static int omap_target(struct cpufreq_policy *policy,
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freqs.old / 1000, volt_old ? volt_old / 1000 : -1,
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freqs.new / 1000, volt ? volt / 1000 : -1);
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/* notifiers */
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cpufreq_notify_transition(policy, &freqs, CPUFREQ_PRECHANGE);
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/* scaling up? scale voltage before frequency */
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if (mpu_reg && (freqs.new > freqs.old)) {
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r = regulator_set_voltage(mpu_reg, volt - tol, volt + tol);
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@ -312,7 +312,7 @@ static void __init s3c2416_cpufreq_cfg_regulator(struct s3c2416_data *s3c_freq)
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if (freq->frequency == CPUFREQ_ENTRY_INVALID)
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continue;
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dvfs = &s3c2416_dvfs_table[freq->index];
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dvfs = &s3c2416_dvfs_table[freq->driver_data];
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found = 0;
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/* Check only the min-voltage, more is always ok on S3C2416 */
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@ -462,7 +462,7 @@ static int __init s3c2416_cpufreq_driver_init(struct cpufreq_policy *policy)
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freq = s3c_freq->freq_table;
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while (freq->frequency != CPUFREQ_TABLE_END) {
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/* special handling for dvs mode */
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if (freq->index == 0) {
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if (freq->driver_data == 0) {
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if (!s3c_freq->hclk) {
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pr_debug("cpufreq: %dkHz unsupported as it would need unavailable dvs mode\n",
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freq->frequency);
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@ -104,7 +104,8 @@ static int s3c64xx_cpufreq_set_target(struct cpufreq_policy *policy,
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if (ret != 0) {
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pr_err("Failed to set VDDARM for %dkHz: %d\n",
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freqs.new, ret);
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goto err;
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freqs.new = freqs.old;
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goto post_notify;
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}
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}
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#endif
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@ -113,10 +114,13 @@ static int s3c64xx_cpufreq_set_target(struct cpufreq_policy *policy,
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if (ret < 0) {
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pr_err("Failed to set rate %dkHz: %d\n",
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freqs.new, ret);
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goto err;
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freqs.new = freqs.old;
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}
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post_notify:
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cpufreq_notify_transition(policy, &freqs, CPUFREQ_POSTCHANGE);
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if (ret)
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goto err;
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#ifdef CONFIG_REGULATOR
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if (vddarm && freqs.new < freqs.old) {
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@ -137,12 +137,12 @@ static int tegra_update_cpu_speed(struct cpufreq_policy *policy,
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if (ret) {
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pr_err("cpu-tegra: Failed to set cpu frequency to %d kHz\n",
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freqs.new);
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return ret;
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freqs.new = freqs.old;
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}
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cpufreq_notify_transition(policy, &freqs, CPUFREQ_POSTCHANGE);
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return 0;
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return ret;
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}
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static unsigned long tegra_cpu_highest_speed(void)
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