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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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rtlwifi: rtl8192ce: Change phy and rc routines for addition of rtl8192se and rtl8192de
Change rtl8192ce routines phy and rc for addition of RTL8192SE and RTL8192DE. Signed-off-by: Chaoming_Li <chaoming_li@realsil.com.cn> Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net> Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:
Chaoming_Li
John W. Linville
parent
2b8359f85b
commit
e0b5a50786
@ -38,7 +38,9 @@
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#include "dm.h"
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#include "table.h"
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u32 rtl92ce_phy_query_rf_reg(struct ieee80211_hw *hw,
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static bool _rtl92c_phy_config_mac_with_headerfile(struct ieee80211_hw *hw);
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u32 rtl92c_phy_query_rf_reg(struct ieee80211_hw *hw,
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enum radio_path rfpath, u32 regaddr, u32 bitmask)
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{
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struct rtl_priv *rtlpriv = rtl_priv(hw);
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@ -73,9 +75,47 @@ u32 rtl92ce_phy_query_rf_reg(struct ieee80211_hw *hw,
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return readback_value;
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}
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bool rtl92c_phy_mac_config(struct ieee80211_hw *hw)
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{
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struct rtl_priv *rtlpriv = rtl_priv(hw);
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struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
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bool is92c = IS_92C_SERIAL(rtlhal->version);
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bool rtstatus = _rtl92c_phy_config_mac_with_headerfile(hw);
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if (is92c)
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rtl_write_byte(rtlpriv, 0x14, 0x71);
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return rtstatus;
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}
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bool rtl92c_phy_bb_config(struct ieee80211_hw *hw)
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{
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bool rtstatus = true;
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struct rtl_priv *rtlpriv = rtl_priv(hw);
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u16 regval;
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u32 regvaldw;
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u8 reg_hwparafile = 1;
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_rtl92c_phy_init_bb_rf_register_definition(hw);
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regval = rtl_read_word(rtlpriv, REG_SYS_FUNC_EN);
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rtl_write_word(rtlpriv, REG_SYS_FUNC_EN,
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regval | BIT(13) | BIT(0) | BIT(1));
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rtl_write_byte(rtlpriv, REG_AFE_PLL_CTRL, 0x83);
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rtl_write_byte(rtlpriv, REG_AFE_PLL_CTRL + 1, 0xdb);
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rtl_write_byte(rtlpriv, REG_RF_CTRL, RF_EN | RF_RSTB | RF_SDMRSTB);
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rtl_write_byte(rtlpriv, REG_SYS_FUNC_EN,
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FEN_PPLL | FEN_PCIEA | FEN_DIO_PCIE |
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FEN_BB_GLB_RSTn | FEN_BBRSTB);
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rtl_write_byte(rtlpriv, REG_AFE_XTAL_CTRL + 1, 0x80);
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regvaldw = rtl_read_dword(rtlpriv, REG_LEDCFG0);
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rtl_write_dword(rtlpriv, REG_LEDCFG0, regvaldw | BIT(23));
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if (reg_hwparafile == 1)
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rtstatus = _rtl92c_phy_bb8192c_config_parafile(hw);
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return rtstatus;
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}
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void rtl92ce_phy_set_rf_reg(struct ieee80211_hw *hw,
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enum radio_path rfpath,
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u32 regaddr, u32 bitmask, u32 data)
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enum radio_path rfpath,
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u32 regaddr, u32 bitmask, u32 data)
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{
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struct rtl_priv *rtlpriv = rtl_priv(hw);
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struct rtl_phy *rtlphy = &(rtlpriv->phy);
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@ -121,45 +161,7 @@ void rtl92ce_phy_set_rf_reg(struct ieee80211_hw *hw,
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bitmask, data, rfpath));
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}
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bool rtl92ce_phy_mac_config(struct ieee80211_hw *hw)
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{
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struct rtl_priv *rtlpriv = rtl_priv(hw);
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struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
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bool is92c = IS_92C_SERIAL(rtlhal->version);
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bool rtstatus = _rtl92ce_phy_config_mac_with_headerfile(hw);
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if (is92c)
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rtl_write_byte(rtlpriv, 0x14, 0x71);
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return rtstatus;
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}
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bool rtl92ce_phy_bb_config(struct ieee80211_hw *hw)
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{
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bool rtstatus = true;
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struct rtl_priv *rtlpriv = rtl_priv(hw);
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u16 regval;
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u32 regvaldw;
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u8 reg_hwparafile = 1;
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_rtl92c_phy_init_bb_rf_register_definition(hw);
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regval = rtl_read_word(rtlpriv, REG_SYS_FUNC_EN);
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rtl_write_word(rtlpriv, REG_SYS_FUNC_EN,
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regval | BIT(13) | BIT(0) | BIT(1));
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rtl_write_byte(rtlpriv, REG_AFE_PLL_CTRL, 0x83);
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rtl_write_byte(rtlpriv, REG_AFE_PLL_CTRL + 1, 0xdb);
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rtl_write_byte(rtlpriv, REG_RF_CTRL, RF_EN | RF_RSTB | RF_SDMRSTB);
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rtl_write_byte(rtlpriv, REG_SYS_FUNC_EN,
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FEN_PPLL | FEN_PCIEA | FEN_DIO_PCIE |
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FEN_BB_GLB_RSTn | FEN_BBRSTB);
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rtl_write_byte(rtlpriv, REG_AFE_XTAL_CTRL + 1, 0x80);
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regvaldw = rtl_read_dword(rtlpriv, REG_LEDCFG0);
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rtl_write_dword(rtlpriv, REG_LEDCFG0, regvaldw | BIT(23));
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if (reg_hwparafile == 1)
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rtstatus = _rtl92c_phy_bb8192c_config_parafile(hw);
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return rtstatus;
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}
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bool _rtl92ce_phy_config_mac_with_headerfile(struct ieee80211_hw *hw)
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static bool _rtl92c_phy_config_mac_with_headerfile(struct ieee80211_hw *hw)
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{
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struct rtl_priv *rtlpriv = rtl_priv(hw);
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u32 i;
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@ -177,7 +179,7 @@ bool _rtl92ce_phy_config_mac_with_headerfile(struct ieee80211_hw *hw)
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}
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bool _rtl92ce_phy_config_bb_with_headerfile(struct ieee80211_hw *hw,
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u8 configtype)
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u8 configtype)
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{
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int i;
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u32 *phy_regarray_table;
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@ -236,7 +238,7 @@ bool _rtl92ce_phy_config_bb_with_headerfile(struct ieee80211_hw *hw,
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}
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bool _rtl92ce_phy_config_bb_with_pgheaderfile(struct ieee80211_hw *hw,
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u8 configtype)
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u8 configtype)
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{
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struct rtl_priv *rtlpriv = rtl_priv(hw);
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int i;
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@ -274,7 +276,7 @@ bool _rtl92ce_phy_config_bb_with_pgheaderfile(struct ieee80211_hw *hw,
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return true;
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}
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bool rtl92ce_phy_config_rf_with_headerfile(struct ieee80211_hw *hw,
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bool rtl92c_phy_config_rf_with_headerfile(struct ieee80211_hw *hw,
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enum radio_path rfpath)
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{
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@ -364,7 +366,7 @@ bool rtl92ce_phy_config_rf_with_headerfile(struct ieee80211_hw *hw,
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return true;
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}
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void rtl92ce_phy_set_bw_mode_callback(struct ieee80211_hw *hw)
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static void rtl92c_phy_set_bw_mode_callback(struct ieee80211_hw *hw)
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{
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struct rtl_priv *rtlpriv = rtl_priv(hw);
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struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
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@ -378,8 +380,10 @@ void rtl92ce_phy_set_bw_mode_callback(struct ieee80211_hw *hw)
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rtlphy->current_chan_bw == HT_CHANNEL_WIDTH_20 ?
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"20MHz" : "40MHz"))
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if (is_hal_stop(rtlhal))
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if (is_hal_stop(rtlhal)) {
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rtlphy->set_bwmode_inprogress = false;
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return;
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}
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reg_bw_opmode = rtl_read_byte(rtlpriv, REG_BWOPMODE);
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reg_prsr_rsc = rtl_read_byte(rtlpriv, REG_RRSR + 2);
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@ -389,16 +393,13 @@ void rtl92ce_phy_set_bw_mode_callback(struct ieee80211_hw *hw)
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reg_bw_opmode |= BW_OPMODE_20MHZ;
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rtl_write_byte(rtlpriv, REG_BWOPMODE, reg_bw_opmode);
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break;
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case HT_CHANNEL_WIDTH_20_40:
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reg_bw_opmode &= ~BW_OPMODE_20MHZ;
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rtl_write_byte(rtlpriv, REG_BWOPMODE, reg_bw_opmode);
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reg_prsr_rsc =
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(reg_prsr_rsc & 0x90) | (mac->cur_40_prime_sc << 5);
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rtl_write_byte(rtlpriv, REG_RRSR + 2, reg_prsr_rsc);
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break;
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default:
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RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
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("unknown bandwidth: %#X\n", rtlphy->current_chan_bw));
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@ -414,10 +415,12 @@ void rtl92ce_phy_set_bw_mode_callback(struct ieee80211_hw *hw)
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case HT_CHANNEL_WIDTH_20_40:
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rtl_set_bbreg(hw, RFPGA0_RFMOD, BRFMOD, 0x1);
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rtl_set_bbreg(hw, RFPGA1_RFMOD, BRFMOD, 0x1);
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rtl_set_bbreg(hw, RCCK0_SYSTEM, BCCK_SIDEBAND,
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(mac->cur_40_prime_sc >> 1));
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rtl_set_bbreg(hw, ROFDM1_LSTF, 0xC00, mac->cur_40_prime_sc);
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rtl_set_bbreg(hw, RFPGA0_ANALOGPARAMETER2, BIT(10), 0);
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rtl_set_bbreg(hw, 0x818, (BIT(26) | BIT(27)),
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(mac->cur_40_prime_sc ==
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HAL_PRIME_CHNL_OFFSET_LOWER) ? 2 : 1);
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@ -427,11 +430,34 @@ void rtl92ce_phy_set_bw_mode_callback(struct ieee80211_hw *hw)
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("unknown bandwidth: %#X\n", rtlphy->current_chan_bw));
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break;
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}
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rtl92c_phy_rf6052_set_bandwidth(hw, rtlphy->current_chan_bw);
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#if 0 /* temporary */
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rtl92ce_phy_rf6052_set_bandwidth(hw, rtlphy->current_chan_bw);
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#endif
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rtlphy->set_bwmode_inprogress = false;
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RT_TRACE(rtlpriv, COMP_SCAN, DBG_TRACE, ("<==\n"));
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}
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void rtl92c_phy_set_bw_mode(struct ieee80211_hw *hw,
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enum nl80211_channel_type ch_type)
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{
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struct rtl_priv *rtlpriv = rtl_priv(hw);
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struct rtl_phy *rtlphy = &(rtlpriv->phy);
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struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
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u8 tmp_bw = rtlphy->current_chan_bw;
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if (rtlphy->set_bwmode_inprogress)
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return;
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rtlphy->set_bwmode_inprogress = true;
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if ((!is_hal_stop(rtlhal)) && !(RT_CANNOT_IO(hw))) {
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rtl92c_phy_set_bw_mode_callback(hw);
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} else {
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RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
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("FALSE driver sleep or unload\n"));
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rtlphy->set_bwmode_inprogress = false;
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rtlphy->current_chan_bw = tmp_bw;
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}
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}
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void _rtl92ce_phy_lc_calibrate(struct ieee80211_hw *hw, bool is2t)
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{
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u8 tmpreg;
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@ -477,6 +503,36 @@ void _rtl92ce_phy_lc_calibrate(struct ieee80211_hw *hw, bool is2t)
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}
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}
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static void _rtl92ce_phy_set_rf_sleep(struct ieee80211_hw *hw)
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{
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u32 u4b_tmp;
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u8 delay = 5;
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struct rtl_priv *rtlpriv = rtl_priv(hw);
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rtl_write_byte(rtlpriv, REG_TXPAUSE, 0xFF);
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rtl_set_rfreg(hw, RF90_PATH_A, 0x00, RFREG_OFFSET_MASK, 0x00);
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rtl_write_byte(rtlpriv, REG_APSD_CTRL, 0x40);
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u4b_tmp = rtl_get_rfreg(hw, RF90_PATH_A, 0, RFREG_OFFSET_MASK);
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while (u4b_tmp != 0 && delay > 0) {
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rtl_write_byte(rtlpriv, REG_APSD_CTRL, 0x0);
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rtl_set_rfreg(hw, RF90_PATH_A, 0x00, RFREG_OFFSET_MASK, 0x00);
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rtl_write_byte(rtlpriv, REG_APSD_CTRL, 0x40);
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u4b_tmp = rtl_get_rfreg(hw, RF90_PATH_A, 0, RFREG_OFFSET_MASK);
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delay--;
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}
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if (delay == 0) {
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rtl_write_byte(rtlpriv, REG_APSD_CTRL, 0x00);
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rtl_write_byte(rtlpriv, REG_SYS_FUNC_EN, 0xE2);
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rtl_write_byte(rtlpriv, REG_SYS_FUNC_EN, 0xE3);
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rtl_write_byte(rtlpriv, REG_TXPAUSE, 0x00);
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RT_TRACE(rtlpriv, COMP_POWER, DBG_TRACE,
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("Switch RF timeout !!!.\n"));
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return;
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}
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rtl_write_byte(rtlpriv, REG_SYS_FUNC_EN, 0xE2);
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rtl_write_byte(rtlpriv, REG_SPS0_CTRL, 0x22);
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}
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static bool _rtl92ce_phy_set_rf_power_state(struct ieee80211_hw *hw,
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enum rf_pwrstate rfpwr_state)
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{
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@ -523,33 +579,6 @@ static bool _rtl92ce_phy_set_rf_power_state(struct ieee80211_hw *hw,
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break;
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}
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case ERFOFF:{
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for (queue_id = 0, i = 0;
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queue_id < RTL_PCI_MAX_TX_QUEUE_COUNT;) {
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ring = &pcipriv->dev.tx_ring[queue_id];
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if (skb_queue_len(&ring->queue) == 0 ||
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queue_id == BEACON_QUEUE) {
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queue_id++;
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continue;
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} else {
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RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
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("eRf Off/Sleep: %d times "
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"TcbBusyQueue[%d] "
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"=%d before doze!\n", (i + 1),
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queue_id,
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skb_queue_len(&ring->queue)));
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udelay(10);
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i++;
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}
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if (i >= MAX_DOZE_WAITING_TIMES_9x) {
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RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
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("\nERFOFF: %d times "
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"TcbBusyQueue[%d] = %d !\n",
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MAX_DOZE_WAITING_TIMES_9x,
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queue_id,
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skb_queue_len(&ring->queue)));
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break;
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}
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}
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if (ppsc->reg_rfps_level & RT_RF_OFF_LEVL_HALT_NIC) {
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RT_TRACE(rtlpriv, COMP_RF, DBG_DMESG,
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("IPS Set eRf nic disable\n"));
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@ -581,6 +610,7 @@ static bool _rtl92ce_phy_set_rf_power_state(struct ieee80211_hw *hw,
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"TcbBusyQueue[%d] =%d before "
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"doze!\n", (i + 1), queue_id,
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skb_queue_len(&ring->queue)));
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udelay(10);
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i++;
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}
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@ -599,7 +629,7 @@ static bool _rtl92ce_phy_set_rf_power_state(struct ieee80211_hw *hw,
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jiffies_to_msecs(jiffies -
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ppsc->last_awake_jiffies)));
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ppsc->last_sleep_jiffies = jiffies;
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_rtl92c_phy_set_rf_sleep(hw);
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_rtl92ce_phy_set_rf_sleep(hw);
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break;
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}
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default:
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@ -614,10 +644,11 @@ static bool _rtl92ce_phy_set_rf_power_state(struct ieee80211_hw *hw,
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return bresult;
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}
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bool rtl92ce_phy_set_rf_power_state(struct ieee80211_hw *hw,
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bool rtl92c_phy_set_rf_power_state(struct ieee80211_hw *hw,
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enum rf_pwrstate rfpwr_state)
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{
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struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
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bool bresult = false;
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if (rfpwr_state == ppsc->rfpwr_state)
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@ -39,6 +39,7 @@
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#define RT_CANNOT_IO(hw) false
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#define HIGHPOWER_RADIOA_ARRAYLEN 22
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#define IQK_ADDA_REG_NUM 16
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#define MAX_TOLERANCE 5
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#define IQK_DELAY_TIME 1
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@ -56,6 +57,8 @@
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#define IQK_ADDA_REG_NUM 16
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#define IQK_MAC_REG_NUM 4
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#define IQK_DELAY_TIME 1
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#define RF90_PATH_MAX 2
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#define CT_OFFSET_MAC_ADDR 0X16
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@ -76,7 +79,7 @@
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#define CT_OFFSET_CUSTOMER_ID 0x7F
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#define RTL92C_MAX_PATH_NUM 2
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#define LLT_LAST_ENTRY_OF_TX_PKT_BUFFER 255
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enum swchnlcmd_id {
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CMDID_END,
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CMDID_SET_TXPOWEROWER_LEVEL,
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@ -184,43 +187,44 @@ struct tx_power_struct {
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u32 mcs_original_offset[4][16];
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};
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extern u32 rtl92c_phy_query_bb_reg(struct ieee80211_hw *hw,
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bool rtl92c_phy_bb_config(struct ieee80211_hw *hw);
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u32 rtl92c_phy_query_bb_reg(struct ieee80211_hw *hw,
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u32 regaddr, u32 bitmask);
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extern void rtl92c_phy_set_bb_reg(struct ieee80211_hw *hw,
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void rtl92c_phy_set_bb_reg(struct ieee80211_hw *hw,
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u32 regaddr, u32 bitmask, u32 data);
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extern u32 rtl92c_phy_query_rf_reg(struct ieee80211_hw *hw,
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u32 rtl92c_phy_query_rf_reg(struct ieee80211_hw *hw,
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enum radio_path rfpath, u32 regaddr,
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u32 bitmask);
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extern void rtl92ce_phy_set_rf_reg(struct ieee80211_hw *hw,
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enum radio_path rfpath, u32 regaddr,
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u32 bitmask, u32 data);
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extern bool rtl92c_phy_mac_config(struct ieee80211_hw *hw);
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enum radio_path rfpath, u32 regaddr,
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u32 bitmask, u32 data);
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bool rtl92c_phy_mac_config(struct ieee80211_hw *hw);
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bool rtl92ce_phy_bb_config(struct ieee80211_hw *hw);
|
||||
extern bool rtl92c_phy_rf_config(struct ieee80211_hw *hw);
|
||||
extern bool rtl92c_phy_config_rf_with_feaderfile(struct ieee80211_hw *hw,
|
||||
bool rtl92c_phy_rf_config(struct ieee80211_hw *hw);
|
||||
bool rtl92c_phy_config_rf_with_feaderfile(struct ieee80211_hw *hw,
|
||||
enum radio_path rfpath);
|
||||
extern void rtl92c_phy_get_hw_reg_originalvalue(struct ieee80211_hw *hw);
|
||||
extern void rtl92c_phy_get_txpower_level(struct ieee80211_hw *hw,
|
||||
void rtl92c_phy_get_hw_reg_originalvalue(struct ieee80211_hw *hw);
|
||||
void rtl92c_phy_get_txpower_level(struct ieee80211_hw *hw,
|
||||
long *powerlevel);
|
||||
extern void rtl92c_phy_set_txpower_level(struct ieee80211_hw *hw, u8 channel);
|
||||
extern bool rtl92c_phy_update_txpower_dbm(struct ieee80211_hw *hw,
|
||||
void rtl92c_phy_set_txpower_level(struct ieee80211_hw *hw, u8 channel);
|
||||
bool rtl92c_phy_update_txpower_dbm(struct ieee80211_hw *hw,
|
||||
long power_indbm);
|
||||
extern void rtl92c_phy_scan_operation_backup(struct ieee80211_hw *hw,
|
||||
void rtl92c_phy_scan_operation_backup(struct ieee80211_hw *hw,
|
||||
u8 operation);
|
||||
extern void rtl92c_phy_set_bw_mode_callback(struct ieee80211_hw *hw);
|
||||
extern void rtl92c_phy_set_bw_mode(struct ieee80211_hw *hw,
|
||||
void rtl92c_phy_set_bw_mode(struct ieee80211_hw *hw,
|
||||
enum nl80211_channel_type ch_type);
|
||||
extern void rtl92c_phy_sw_chnl_callback(struct ieee80211_hw *hw);
|
||||
extern u8 rtl92c_phy_sw_chnl(struct ieee80211_hw *hw);
|
||||
extern void rtl92c_phy_iq_calibrate(struct ieee80211_hw *hw, bool b_recovery);
|
||||
extern void rtl92c_phy_set_beacon_hw_reg(struct ieee80211_hw *hw,
|
||||
void rtl92c_phy_sw_chnl_callback(struct ieee80211_hw *hw);
|
||||
u8 rtl92c_phy_sw_chnl(struct ieee80211_hw *hw);
|
||||
void rtl92c_phy_iq_calibrate(struct ieee80211_hw *hw, bool b_recovery);
|
||||
void rtl92c_phy_set_beacon_hw_reg(struct ieee80211_hw *hw,
|
||||
u16 beaconinterval);
|
||||
void rtl92c_phy_ap_calibrate(struct ieee80211_hw *hw, char delta);
|
||||
void rtl92c_phy_lc_calibrate(struct ieee80211_hw *hw);
|
||||
void _rtl92ce_phy_lc_calibrate(struct ieee80211_hw *hw, bool is2t);
|
||||
void rtl92c_phy_set_rfpath_switch(struct ieee80211_hw *hw, bool bmain);
|
||||
bool rtl92c_phy_config_rf_with_headerfile(struct ieee80211_hw *hw,
|
||||
enum radio_path rfpath);
|
||||
extern bool rtl8192_phy_check_is_legal_rfpath(struct ieee80211_hw *hw,
|
||||
bool rtl8192_phy_check_is_legal_rfpath(struct ieee80211_hw *hw,
|
||||
u32 rfpath);
|
||||
bool rtl92c_phy_set_io_cmd(struct ieee80211_hw *hw, enum io_type iotype);
|
||||
bool rtl92ce_phy_set_rf_power_state(struct ieee80211_hw *hw,
|
||||
@ -237,9 +241,6 @@ u32 _rtl92c_phy_calculate_bit_shift(u32 bitmask);
|
||||
void _rtl92c_phy_rf_serial_write(struct ieee80211_hw *hw,
|
||||
enum radio_path rfpath, u32 offset,
|
||||
u32 data);
|
||||
void _rtl92c_store_pwrIndex_diffrate_offset(struct ieee80211_hw *hw,
|
||||
u32 regaddr, u32 bitmask,
|
||||
u32 data);
|
||||
void _rtl92c_phy_fw_rf_serial_write(struct ieee80211_hw *hw,
|
||||
enum radio_path rfpath, u32 offset,
|
||||
u32 data);
|
||||
@ -250,5 +251,7 @@ bool _rtl92ce_phy_config_mac_with_headerfile(struct ieee80211_hw *hw);
|
||||
void _rtl92c_phy_init_bb_rf_register_definition(struct ieee80211_hw *hw);
|
||||
bool _rtl92c_phy_bb8192c_config_parafile(struct ieee80211_hw *hw);
|
||||
void _rtl92c_phy_set_rf_sleep(struct ieee80211_hw *hw);
|
||||
bool rtl92c_phy_set_rf_power_state(struct ieee80211_hw *hw,
|
||||
enum rf_pwrstate rfpwr_state);
|
||||
|
||||
#endif
|
||||
|
||||
@ -34,9 +34,9 @@
|
||||
#include "rf.h"
|
||||
#include "dm.h"
|
||||
|
||||
static bool _rtl92c_phy_rf6052_config_parafile(struct ieee80211_hw *hw);
|
||||
static bool _rtl92ce_phy_rf6052_config_parafile(struct ieee80211_hw *hw);
|
||||
|
||||
void rtl92c_phy_rf6052_set_bandwidth(struct ieee80211_hw *hw, u8 bandwidth)
|
||||
void rtl92ce_phy_rf6052_set_bandwidth(struct ieee80211_hw *hw, u8 bandwidth)
|
||||
{
|
||||
struct rtl_priv *rtlpriv = rtl_priv(hw);
|
||||
struct rtl_phy *rtlphy = &(rtlpriv->phy);
|
||||
@ -62,7 +62,7 @@ void rtl92c_phy_rf6052_set_bandwidth(struct ieee80211_hw *hw, u8 bandwidth)
|
||||
}
|
||||
|
||||
void rtl92ce_phy_rf6052_set_cck_txpower(struct ieee80211_hw *hw,
|
||||
u8 *ppowerlevel)
|
||||
u8 *ppowerlevel)
|
||||
{
|
||||
struct rtl_priv *rtlpriv = rtl_priv(hw);
|
||||
struct rtl_phy *rtlphy = &(rtlpriv->phy);
|
||||
@ -128,8 +128,7 @@ void rtl92ce_phy_rf6052_set_cck_txpower(struct ieee80211_hw *hw,
|
||||
|
||||
tmpval = tx_agc[RF90_PATH_A] >> 8;
|
||||
|
||||
if (mac->mode == WIRELESS_MODE_B)
|
||||
tmpval = tmpval & 0xff00ffff;
|
||||
tmpval = tmpval & 0xff00ffff;
|
||||
|
||||
rtl_set_bbreg(hw, RTXAGC_B_CCK11_A_CCK2_11, 0xffffff00, tmpval);
|
||||
|
||||
@ -440,16 +439,17 @@ bool rtl92ce_phy_rf6052_config(struct ieee80211_hw *hw)
|
||||
else
|
||||
rtlphy->num_total_rfpath = 2;
|
||||
|
||||
return _rtl92c_phy_rf6052_config_parafile(hw);
|
||||
return _rtl92ce_phy_rf6052_config_parafile(hw);
|
||||
|
||||
}
|
||||
|
||||
static bool _rtl92c_phy_rf6052_config_parafile(struct ieee80211_hw *hw)
|
||||
static bool _rtl92ce_phy_rf6052_config_parafile(struct ieee80211_hw *hw)
|
||||
{
|
||||
struct rtl_priv *rtlpriv = rtl_priv(hw);
|
||||
struct rtl_phy *rtlphy = &(rtlpriv->phy);
|
||||
u32 u4_regvalue = 0;
|
||||
u8 rfpath;
|
||||
bool rtstatus;
|
||||
bool rtstatus = true;
|
||||
struct bb_reg_def *pphyreg;
|
||||
|
||||
for (rfpath = 0; rfpath < rtlphy->num_total_rfpath; rfpath++) {
|
||||
@ -484,12 +484,12 @@ static bool _rtl92c_phy_rf6052_config_parafile(struct ieee80211_hw *hw)
|
||||
|
||||
switch (rfpath) {
|
||||
case RF90_PATH_A:
|
||||
rtstatus = rtl92ce_phy_config_rf_with_headerfile(hw,
|
||||
(enum radio_path) rfpath);
|
||||
rtstatus = rtl92c_phy_config_rf_with_headerfile(hw,
|
||||
(enum radio_path)rfpath);
|
||||
break;
|
||||
case RF90_PATH_B:
|
||||
rtstatus = rtl92ce_phy_config_rf_with_headerfile(hw,
|
||||
(enum radio_path) rfpath);
|
||||
rtstatus = rtl92c_phy_config_rf_with_headerfile(hw,
|
||||
(enum radio_path)rfpath);
|
||||
break;
|
||||
case RF90_PATH_C:
|
||||
break;
|
||||
|
||||
@ -34,14 +34,11 @@
|
||||
#define RF6052_MAX_REG 0x3F
|
||||
#define RF6052_MAX_PATH 2
|
||||
|
||||
extern void rtl92c_phy_rf6052_set_bandwidth(struct ieee80211_hw *hw,
|
||||
u8 bandwidth);
|
||||
extern void rtl92c_phy_rf6052_set_cck_txpower(struct ieee80211_hw *hw,
|
||||
u8 *ppowerlevel);
|
||||
extern void rtl92c_phy_rf6052_set_ofdm_txpower(struct ieee80211_hw *hw,
|
||||
u8 *ppowerlevel, u8 channel);
|
||||
bool rtl92ce_phy_rf6052_config(struct ieee80211_hw *hw);
|
||||
bool rtl92ce_phy_config_rf_with_headerfile(struct ieee80211_hw *hw,
|
||||
enum radio_path rfpath);
|
||||
|
||||
extern void rtl92ce_phy_rf6052_set_bandwidth(struct ieee80211_hw *hw,
|
||||
u8 bandwidth);
|
||||
extern void rtl92ce_phy_rf6052_set_cck_txpower(struct ieee80211_hw *hw,
|
||||
u8 *ppowerlevel);
|
||||
extern void rtl92ce_phy_rf6052_set_ofdm_txpower(struct ieee80211_hw *hw,
|
||||
u8 *ppowerlevel, u8 channel);
|
||||
extern bool rtl92ce_phy_rf6052_config(struct ieee80211_hw *hw);
|
||||
#endif
|
||||
|
||||
Loading…
Reference in New Issue
Block a user