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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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clk: mediatek: Add __initdata and __init for data and functions
Add __init for clock registration functions, and add __initdata for mtk_gate_regs initial structures. Signed-off-by: James Liao <jamesjj.liao@mediatek.com> Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
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@ -97,7 +97,7 @@ const struct clk_ops mtk_clk_gate_ops_setclr_inv = {
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.disable = mtk_cg_disable_inv,
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};
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struct clk *mtk_clk_register_gate(
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struct clk * __init mtk_clk_register_gate(
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const char *name,
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const char *parent_name,
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struct regmap *regmap,
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@ -587,7 +587,7 @@ static const struct mtk_composite top_muxes[] __initconst = {
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MUX(CLK_TOP_I2S3_B_SEL, "i2s3_b_ck_sel", i2s3_b_ck_parents, 0x120, 8, 1),
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};
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static const struct mtk_gate_regs infra_cg_regs = {
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static const struct mtk_gate_regs infra_cg_regs __initconst = {
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.set_ofs = 0x0040,
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.clr_ofs = 0x0044,
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.sta_ofs = 0x0048,
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@ -620,13 +620,13 @@ static const struct mtk_fixed_factor infra_divs[] __initconst = {
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FACTOR(CLK_INFRA_CLK_13M, "clk13m", "clk26m", 1, 2),
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};
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static const struct mtk_gate_regs peri0_cg_regs = {
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static const struct mtk_gate_regs peri0_cg_regs __initconst = {
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.set_ofs = 0x0008,
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.clr_ofs = 0x0010,
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.sta_ofs = 0x0018,
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};
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static const struct mtk_gate_regs peri1_cg_regs = {
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static const struct mtk_gate_regs peri1_cg_regs __initconst = {
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.set_ofs = 0x000c,
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.clr_ofs = 0x0014,
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.sta_ofs = 0x001c,
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@ -24,7 +24,7 @@
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#include "clk-mtk.h"
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#include "clk-gate.h"
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struct clk_onecell_data *mtk_alloc_clk_data(unsigned int clk_num)
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struct clk_onecell_data * __init mtk_alloc_clk_data(unsigned int clk_num)
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{
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int i;
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struct clk_onecell_data *clk_data;
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@ -49,8 +49,8 @@ struct clk_onecell_data *mtk_alloc_clk_data(unsigned int clk_num)
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return NULL;
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}
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void mtk_clk_register_factors(const struct mtk_fixed_factor *clks, int num,
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struct clk_onecell_data *clk_data)
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void __init mtk_clk_register_factors(const struct mtk_fixed_factor *clks,
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int num, struct clk_onecell_data *clk_data)
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{
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int i;
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struct clk *clk;
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@ -72,7 +72,8 @@ void mtk_clk_register_factors(const struct mtk_fixed_factor *clks, int num,
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}
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}
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int mtk_clk_register_gates(struct device_node *node, const struct mtk_gate *clks,
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int __init mtk_clk_register_gates(struct device_node *node,
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const struct mtk_gate *clks,
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int num, struct clk_onecell_data *clk_data)
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{
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int i;
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@ -111,7 +112,7 @@ int mtk_clk_register_gates(struct device_node *node, const struct mtk_gate *clks
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return 0;
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}
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struct clk *mtk_clk_register_composite(const struct mtk_composite *mc,
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struct clk * __init mtk_clk_register_composite(const struct mtk_composite *mc,
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void __iomem *base, spinlock_t *lock)
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{
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struct clk *clk;
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@ -196,7 +197,7 @@ struct clk *mtk_clk_register_composite(const struct mtk_composite *mc,
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return ERR_PTR(ret);
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}
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void mtk_clk_register_composites(const struct mtk_composite *mcs,
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void __init mtk_clk_register_composites(const struct mtk_composite *mcs,
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int num, void __iomem *base, spinlock_t *lock,
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struct clk_onecell_data *clk_data)
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{
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