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bnxt_en: Add coalescing support for tx rings.
When tx and rx rings don't share the same completion ring, tx coalescing parameters can be set differently from the rx coalescing parameters. Otherwise, use rx coalescing parameters on shared completion rings. Adjust rx coalescing default values to lower interrupt rate. Signed-off-by: Michael Chan <mchan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -3539,13 +3539,16 @@ static void bnxt_hwrm_set_coal_params(struct bnxt *bp, u32 max_bufs,
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int bnxt_hwrm_set_coal(struct bnxt *bp)
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{
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int i, rc = 0;
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struct hwrm_ring_cmpl_ring_cfg_aggint_params_input req = {0};
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struct hwrm_ring_cmpl_ring_cfg_aggint_params_input req_rx = {0},
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req_tx = {0}, *req;
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u16 max_buf, max_buf_irq;
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u16 buf_tmr, buf_tmr_irq;
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u32 flags;
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bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_RING_CMPL_RING_CFG_AGGINT_PARAMS,
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-1, -1);
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bnxt_hwrm_cmd_hdr_init(bp, &req_rx,
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HWRM_RING_CMPL_RING_CFG_AGGINT_PARAMS, -1, -1);
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bnxt_hwrm_cmd_hdr_init(bp, &req_tx,
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HWRM_RING_CMPL_RING_CFG_AGGINT_PARAMS, -1, -1);
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/* Each rx completion (2 records) should be DMAed immediately.
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* DMA 1/4 of the completion buffers at a time.
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@ -3569,13 +3572,31 @@ int bnxt_hwrm_set_coal(struct bnxt *bp)
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flags |= RING_CMPL_RING_CFG_AGGINT_PARAMS_REQ_FLAGS_RING_IDLE;
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bnxt_hwrm_set_coal_params(bp, max_buf_irq << 16 | max_buf,
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buf_tmr_irq << 16 | buf_tmr, flags, &req);
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buf_tmr_irq << 16 | buf_tmr, flags, &req_rx);
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/* max_buf must not be zero */
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max_buf = clamp_t(u16, bp->tx_coal_bufs, 1, 63);
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max_buf_irq = clamp_t(u16, bp->tx_coal_bufs_irq, 1, 63);
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buf_tmr = BNXT_USEC_TO_COAL_TIMER(bp->tx_coal_ticks);
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/* buf timer set to 1/4 of interrupt timer */
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buf_tmr = max_t(u16, buf_tmr / 4, 1);
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buf_tmr_irq = BNXT_USEC_TO_COAL_TIMER(bp->tx_coal_ticks_irq);
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buf_tmr_irq = max_t(u16, buf_tmr_irq, 1);
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flags = RING_CMPL_RING_CFG_AGGINT_PARAMS_REQ_FLAGS_TIMER_RESET;
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bnxt_hwrm_set_coal_params(bp, max_buf_irq << 16 | max_buf,
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buf_tmr_irq << 16 | buf_tmr, flags, &req_tx);
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mutex_lock(&bp->hwrm_cmd_lock);
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for (i = 0; i < bp->cp_nr_rings; i++) {
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req.ring_id = cpu_to_le16(bp->grp_info[i].cp_fw_ring_id);
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struct bnxt_napi *bnapi = bp->bnapi[i];
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rc = _hwrm_send_message(bp, &req, sizeof(req),
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req = &req_rx;
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if (!bnapi->rx_ring)
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req = &req_tx;
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req->ring_id = cpu_to_le16(bp->grp_info[i].cp_fw_ring_id);
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rc = _hwrm_send_message(bp, req, sizeof(*req),
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HWRM_CMD_TIMEOUT);
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if (rc)
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break;
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@ -5310,11 +5331,16 @@ static int bnxt_init_board(struct pci_dev *pdev, struct net_device *dev)
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bp->tx_ring_size = BNXT_DEFAULT_TX_RING_SIZE;
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/* tick values in micro seconds */
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bp->rx_coal_ticks = 4;
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bp->rx_coal_bufs = 20;
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bp->rx_coal_ticks = 12;
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bp->rx_coal_bufs = 30;
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bp->rx_coal_ticks_irq = 1;
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bp->rx_coal_bufs_irq = 2;
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bp->tx_coal_ticks = 25;
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bp->tx_coal_bufs = 30;
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bp->tx_coal_ticks_irq = 2;
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bp->tx_coal_bufs_irq = 2;
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init_timer(&bp->timer);
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bp->timer.data = (unsigned long)bp;
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bp->timer.function = bnxt_timer;
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@ -968,10 +968,15 @@ struct bnxt {
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__le16 vxlan_fw_dst_port_id;
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u8 nge_port_cnt;
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__le16 nge_fw_dst_port_id;
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u16 rx_coal_ticks;
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u16 rx_coal_ticks_irq;
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u16 rx_coal_bufs;
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u16 rx_coal_bufs_irq;
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u16 tx_coal_ticks;
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u16 tx_coal_ticks_irq;
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u16 tx_coal_bufs;
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u16 tx_coal_bufs_irq;
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#define BNXT_USEC_TO_COAL_TIMER(x) ((x) * 25 / 2)
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@ -47,6 +47,11 @@ static int bnxt_get_coalesce(struct net_device *dev,
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coal->rx_coalesce_usecs_irq = bp->rx_coal_ticks_irq;
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coal->rx_max_coalesced_frames_irq = bp->rx_coal_bufs_irq / 2;
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coal->tx_coalesce_usecs = bp->tx_coal_ticks;
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coal->tx_max_coalesced_frames = bp->tx_coal_bufs;
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coal->tx_coalesce_usecs_irq = bp->tx_coal_ticks_irq;
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coal->tx_max_coalesced_frames_irq = bp->tx_coal_bufs_irq;
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return 0;
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}
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@ -62,6 +67,11 @@ static int bnxt_set_coalesce(struct net_device *dev,
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bp->rx_coal_ticks_irq = coal->rx_coalesce_usecs_irq;
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bp->rx_coal_bufs_irq = coal->rx_max_coalesced_frames_irq * 2;
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bp->tx_coal_ticks = coal->tx_coalesce_usecs;
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bp->tx_coal_bufs = coal->tx_max_coalesced_frames;
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bp->tx_coal_ticks_irq = coal->tx_coalesce_usecs_irq;
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bp->tx_coal_bufs_irq = coal->tx_max_coalesced_frames_irq;
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if (netif_running(dev))
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rc = bnxt_hwrm_set_coal(bp);
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