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NVMe: Add nvme subsystem reset support
Controllers part of an NVMe subsystem may be reset by any other controller in the subsystem. If the device is capable of subsystem resets, this patch adds detection for such events and performs appropriate controller initialization upon subsystem reset detection. The register bit is a RW1C type, so the driver needs to write a 1 to the status bit to clear the subsystem reset occured bit during initialization. Signed-off-by: Keith Busch <keith.busch@intel.com> Signed-off-by: Jens Axboe <axboe@fb.com>
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@ -1735,6 +1735,12 @@ static int nvme_configure_admin_queue(struct nvme_dev *dev)
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page_shift = dev_page_max;
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}
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dev->subsystem = readl(&dev->bar->vs) >= NVME_VS(1, 1) ?
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NVME_CAP_NSSRC(cap) : 0;
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if (dev->subsystem && (readl(&dev->bar->csts) & NVME_CSTS_NSSRO))
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writel(NVME_CSTS_NSSRO, &dev->bar->csts);
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result = nvme_disable_ctrl(dev, cap);
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if (result < 0)
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return result;
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@ -2059,7 +2065,10 @@ static int nvme_kthread(void *data)
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spin_lock(&dev_list_lock);
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list_for_each_entry_safe(dev, next, &dev_list, node) {
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int i;
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if (readl(&dev->bar->csts) & NVME_CSTS_CFS) {
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u32 csts = readl(&dev->bar->csts);
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if ((dev->subsystem && (csts & NVME_CSTS_NSSRO)) ||
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csts & NVME_CSTS_CFS) {
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if (work_busy(&dev->reset_work))
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continue;
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list_del_init(&dev->node);
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@ -39,6 +39,7 @@ struct nvme_bar {
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#define NVME_CAP_MQES(cap) ((cap) & 0xffff)
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#define NVME_CAP_TIMEOUT(cap) (((cap) >> 24) & 0xff)
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#define NVME_CAP_STRIDE(cap) (((cap) >> 32) & 0xf)
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#define NVME_CAP_NSSRC(cap) (((cap) >> 36) & 0x1)
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#define NVME_CAP_MPSMIN(cap) (((cap) >> 48) & 0xf)
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#define NVME_CAP_MPSMAX(cap) (((cap) >> 52) & 0xf)
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@ -68,6 +69,7 @@ enum {
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NVME_CC_IOCQES = 4 << 20,
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NVME_CSTS_RDY = 1 << 0,
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NVME_CSTS_CFS = 1 << 1,
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NVME_CSTS_NSSRO = 1 << 4,
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NVME_CSTS_SHST_NORMAL = 0 << 2,
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NVME_CSTS_SHST_OCCUR = 1 << 2,
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NVME_CSTS_SHST_CMPLT = 2 << 2,
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@ -110,6 +112,7 @@ struct nvme_dev {
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char serial[20];
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char model[40];
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char firmware_rev[8];
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bool subsystem;
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u32 max_hw_sectors;
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u32 stripe_size;
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u32 page_size;
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