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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-18 19:16:49 +07:00
drm/amdgpu: add sched sync for amdgpu job v2
this is an improvement for previous patch, the sched_sync is to store fence that could be skipped as scheduled, when job is executed, we didn't need pipeline_sync if all fences in sched_sync are signalled, otherwise insert pipeline_sync still. v2: handle error when adding fence to sync failed. Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com> (v1) Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -1124,6 +1124,7 @@ struct amdgpu_job {
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struct amdgpu_vm *vm;
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struct amdgpu_ring *ring;
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struct amdgpu_sync sync;
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struct amdgpu_sync sched_sync;
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struct amdgpu_ib *ibs;
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struct dma_fence *fence; /* the hw fence */
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uint32_t preamble_status;
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@ -121,6 +121,7 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned num_ibs,
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{
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struct amdgpu_device *adev = ring->adev;
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struct amdgpu_ib *ib = &ibs[0];
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struct dma_fence *tmp;
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bool skip_preamble, need_ctx_switch;
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unsigned patch_offset = ~0;
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struct amdgpu_vm *vm;
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@ -160,8 +161,13 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned num_ibs,
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dev_err(adev->dev, "scheduling IB failed (%d).\n", r);
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return r;
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}
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if (ring->funcs->emit_pipeline_sync && job && job->need_pipeline_sync)
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if (ring->funcs->emit_pipeline_sync && job &&
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(tmp = amdgpu_sync_get_fence(&job->sched_sync))) {
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job->need_pipeline_sync = true;
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amdgpu_ring_emit_pipeline_sync(ring);
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dma_fence_put(tmp);
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}
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if (vm) {
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r = amdgpu_vm_flush(ring, job);
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@ -60,6 +60,7 @@ int amdgpu_job_alloc(struct amdgpu_device *adev, unsigned num_ibs,
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(*job)->need_pipeline_sync = false;
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amdgpu_sync_create(&(*job)->sync);
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amdgpu_sync_create(&(*job)->sched_sync);
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return 0;
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}
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@ -98,6 +99,7 @@ static void amdgpu_job_free_cb(struct amd_sched_job *s_job)
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dma_fence_put(job->fence);
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amdgpu_sync_free(&job->sync);
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amdgpu_sync_free(&job->sched_sync);
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kfree(job);
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}
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@ -107,6 +109,7 @@ void amdgpu_job_free(struct amdgpu_job *job)
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dma_fence_put(job->fence);
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amdgpu_sync_free(&job->sync);
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amdgpu_sync_free(&job->sched_sync);
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kfree(job);
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}
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@ -139,10 +142,10 @@ static struct dma_fence *amdgpu_job_dependency(struct amd_sched_job *sched_job)
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struct amdgpu_vm *vm = job->vm;
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struct dma_fence *fence = amdgpu_sync_get_fence(&job->sync);
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int r;
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while (fence == NULL && vm && !job->vm_id) {
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struct amdgpu_ring *ring = job->ring;
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int r;
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r = amdgpu_vm_grab_id(vm, ring, &job->sync,
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&job->base.s_fence->finished,
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@ -153,9 +156,11 @@ static struct dma_fence *amdgpu_job_dependency(struct amd_sched_job *sched_job)
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fence = amdgpu_sync_get_fence(&job->sync);
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}
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if (amd_sched_dependency_optimized(fence, sched_job->s_entity))
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job->need_pipeline_sync = true;
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if (amd_sched_dependency_optimized(fence, sched_job->s_entity)) {
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r = amdgpu_sync_fence(job->adev, &job->sched_sync, fence);
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if (r)
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DRM_ERROR("Error adding fence to sync (%d)\n", r);
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}
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return fence;
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}
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