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treewide: Use fallthrough pseudo-keyword

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Replace the existing /* fall through */ comments and its variants with
the new pseudo-keyword macro fallthrough[1]. Also, remove unnecessary
fall-through markings when it is the case.

[1] https://www.kernel.org/doc/html/v5.7/process/deprecated.html?highlight=fallthrough#implicit-switch-case-fall-through

Signed-off-by: Gustavo A. R. Silva <gustavoars@kernel.org>
This commit is contained in:
Gustavo A. R. Silva 2020-08-23 17:36:59 -05:00
parent d012a7190f
commit df561f6688
1148 changed files with 2667 additions and 2737 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
arch/alpha/kernel/module.c
View File

@ -212,7 +212,7 @@ apply_relocate_add(Elf64_Shdr *sechdrs, const char *strtab,
STO_ALPHA_STD_GPLOAD) STO_ALPHA_STD_GPLOAD)
/* Omit the prologue. */ /* Omit the prologue. */
value += 8; value += 8;
/* FALLTHRU */ fallthrough;
case R_ALPHA_BRADDR: case R_ALPHA_BRADDR:
value -= (u64)location + 4; value -= (u64)location + 4;
if (value & 3) if (value & 3)

2
arch/alpha/kernel/signal.c
View File

@ -453,7 +453,7 @@ syscall_restart(unsigned long r0, unsigned long r19,
regs->r0 = EINTR; regs->r0 = EINTR;
break; break;
} }
/* fallthrough */ fallthrough;
case ERESTARTNOINTR: case ERESTARTNOINTR:
regs->r0 = r0; /* reset v0 and a3 and replay syscall */ regs->r0 = r0; /* reset v0 and a3 and replay syscall */
regs->r19 = r19; regs->r19 = r19;

4
arch/alpha/kernel/traps.c
View File

@ -883,7 +883,7 @@ do_entUnaUser(void __user * va, unsigned long opcode,
case 0x26: /* sts */ case 0x26: /* sts */
fake_reg = s_reg_to_mem(alpha_read_fp_reg(reg)); fake_reg = s_reg_to_mem(alpha_read_fp_reg(reg));
/* FALLTHRU */ fallthrough;
case 0x2c: /* stl */ case 0x2c: /* stl */
__asm__ __volatile__( __asm__ __volatile__(
@ -911,7 +911,7 @@ do_entUnaUser(void __user * va, unsigned long opcode,
case 0x27: /* stt */ case 0x27: /* stt */
fake_reg = alpha_read_fp_reg(reg); fake_reg = alpha_read_fp_reg(reg);
/* FALLTHRU */ fallthrough;
case 0x2d: /* stq */ case 0x2d: /* stq */
__asm__ __volatile__( __asm__ __volatile__(

2
arch/arc/kernel/disasm.c
View File

@ -339,7 +339,7 @@ void __kprobes disasm_instr(unsigned long addr, struct disasm_state *state,
case op_LDWX_S: /* LDWX_S c, [b, u6] */ case op_LDWX_S: /* LDWX_S c, [b, u6] */
state->x = 1; state->x = 1;
/* intentional fall-through */ fallthrough;
case op_LDW_S: /* LDW_S c, [b, u6] */ case op_LDW_S: /* LDW_S c, [b, u6] */
state->zz = 2; state->zz = 2;

2
arch/arc/kernel/signal.c
View File

@ -321,7 +321,7 @@ static void arc_restart_syscall(struct k_sigaction *ka, struct pt_regs *regs)
regs->r0 = -EINTR; regs->r0 = -EINTR;
break; break;
} }
/* fallthrough */ fallthrough;
case -ERESTARTNOINTR: case -ERESTARTNOINTR:
/* /*

6
arch/arc/kernel/unwind.c
View File

@ -572,7 +572,7 @@ static unsigned long read_pointer(const u8 **pLoc, const void *end,
#else #else
BUILD_BUG_ON(sizeof(u32) != sizeof(value)); BUILD_BUG_ON(sizeof(u32) != sizeof(value));
#endif #endif
/* Fall through */ fallthrough;
case DW_EH_PE_native: case DW_EH_PE_native:
if (end < (const void *)(ptr.pul + 1)) if (end < (const void *)(ptr.pul + 1))
return 0; return 0;
@ -827,7 +827,7 @@ static int processCFI(const u8 *start, const u8 *end, unsigned long targetLoc,
case DW_CFA_def_cfa: case DW_CFA_def_cfa:
state->cfa.reg = get_uleb128(&ptr.p8, end); state->cfa.reg = get_uleb128(&ptr.p8, end);
unw_debug("cfa_def_cfa: r%lu ", state->cfa.reg); unw_debug("cfa_def_cfa: r%lu ", state->cfa.reg);
/* fall through */ fallthrough;
case DW_CFA_def_cfa_offset: case DW_CFA_def_cfa_offset:
state->cfa.offs = get_uleb128(&ptr.p8, end); state->cfa.offs = get_uleb128(&ptr.p8, end);
unw_debug("cfa_def_cfa_offset: 0x%lx ", unw_debug("cfa_def_cfa_offset: 0x%lx ",
@ -835,7 +835,7 @@ static int processCFI(const u8 *start, const u8 *end, unsigned long targetLoc,
break; break;
case DW_CFA_def_cfa_sf: case DW_CFA_def_cfa_sf:
state->cfa.reg = get_uleb128(&ptr.p8, end); state->cfa.reg = get_uleb128(&ptr.p8, end);
/* fall through */ fallthrough;
case DW_CFA_def_cfa_offset_sf: case DW_CFA_def_cfa_offset_sf:
state->cfa.offs = get_sleb128(&ptr.p8, end) state->cfa.offs = get_sleb128(&ptr.p8, end)
* state->dataAlign; * state->dataAlign;

10
arch/arm/kernel/hw_breakpoint.c
View File

@ -547,7 +547,7 @@ static int arch_build_bp_info(struct perf_event *bp,
if ((hw->ctrl.type != ARM_BREAKPOINT_EXECUTE) if ((hw->ctrl.type != ARM_BREAKPOINT_EXECUTE)
&& max_watchpoint_len >= 8) && max_watchpoint_len >= 8)
break; break;
/* Else, fall through */ fallthrough;
default: default:
return -EINVAL; return -EINVAL;
} }
@ -612,12 +612,12 @@ int hw_breakpoint_arch_parse(struct perf_event *bp,
/* Allow halfword watchpoints and breakpoints. */ /* Allow halfword watchpoints and breakpoints. */
if (hw->ctrl.len == ARM_BREAKPOINT_LEN_2) if (hw->ctrl.len == ARM_BREAKPOINT_LEN_2)
break; break;
/* Else, fall through */ fallthrough;
case 3: case 3:
/* Allow single byte watchpoint. */ /* Allow single byte watchpoint. */
if (hw->ctrl.len == ARM_BREAKPOINT_LEN_1) if (hw->ctrl.len == ARM_BREAKPOINT_LEN_1)
break; break;
/* Else, fall through */ fallthrough;
default: default:
ret = -EINVAL; ret = -EINVAL;
goto out; goto out;
@ -884,7 +884,7 @@ static int hw_breakpoint_pending(unsigned long addr, unsigned int fsr,
break; break;
case ARM_ENTRY_ASYNC_WATCHPOINT: case ARM_ENTRY_ASYNC_WATCHPOINT:
WARN(1, "Asynchronous watchpoint exception taken. Debugging results may be unreliable\n"); WARN(1, "Asynchronous watchpoint exception taken. Debugging results may be unreliable\n");
/* Fall through */ fallthrough;
case ARM_ENTRY_SYNC_WATCHPOINT: case ARM_ENTRY_SYNC_WATCHPOINT:
watchpoint_handler(addr, fsr, regs); watchpoint_handler(addr, fsr, regs);
break; break;
@ -933,7 +933,7 @@ static bool core_has_os_save_restore(void)
ARM_DBG_READ(c1, c1, 4, oslsr); ARM_DBG_READ(c1, c1, 4, oslsr);
if (oslsr & ARM_OSLSR_OSLM0) if (oslsr & ARM_OSLSR_OSLM0)
return true; return true;
/* Else, fall through */ fallthrough;
default: default:
return false; return false;
} }

2
arch/arm/kernel/signal.c
View File

@ -596,7 +596,7 @@ static int do_signal(struct pt_regs *regs, int syscall)
switch (retval) { switch (retval) {
case -ERESTART_RESTARTBLOCK: case -ERESTART_RESTARTBLOCK:
restart -= 2; restart -= 2;
/* Fall through */ fallthrough;
case -ERESTARTNOHAND: case -ERESTARTNOHAND:
case -ERESTARTSYS: case -ERESTARTSYS:
case -ERESTARTNOINTR: case -ERESTARTNOINTR:

2
arch/arm/mach-ep93xx/crunch.c
View File

@ -49,7 +49,7 @@ static int crunch_do(struct notifier_block *self, unsigned long cmd, void *t)
* FALLTHROUGH: Ensure we don't try to overwrite our newly * FALLTHROUGH: Ensure we don't try to overwrite our newly
* initialised state information on the first fault. * initialised state information on the first fault.
*/ */
/* Fall through */ fallthrough;
case THREAD_NOTIFY_EXIT: case THREAD_NOTIFY_EXIT:
crunch_task_release(thread); crunch_task_release(thread);

8
arch/arm/mach-mmp/pm-mmp2.c
View File

@ -123,19 +123,19 @@ void mmp2_pm_enter_lowpower_mode(int state)
case POWER_MODE_SYS_SLEEP: case POWER_MODE_SYS_SLEEP:
apcr |= MPMU_PCR_PJ_SLPEN; /* set the SLPEN bit */ apcr |= MPMU_PCR_PJ_SLPEN; /* set the SLPEN bit */
apcr |= MPMU_PCR_PJ_VCTCXOSD; /* set VCTCXOSD */ apcr |= MPMU_PCR_PJ_VCTCXOSD; /* set VCTCXOSD */
/* fall through */ fallthrough;
case POWER_MODE_CHIP_SLEEP: case POWER_MODE_CHIP_SLEEP:
apcr |= MPMU_PCR_PJ_SLPEN; apcr |= MPMU_PCR_PJ_SLPEN;
/* fall through */ fallthrough;
case POWER_MODE_APPS_SLEEP: case POWER_MODE_APPS_SLEEP:
apcr |= MPMU_PCR_PJ_APBSD; /* set APBSD */ apcr |= MPMU_PCR_PJ_APBSD; /* set APBSD */
/* fall through */ fallthrough;
case POWER_MODE_APPS_IDLE: case POWER_MODE_APPS_IDLE:
apcr |= MPMU_PCR_PJ_AXISD; /* set AXISDD bit */ apcr |= MPMU_PCR_PJ_AXISD; /* set AXISDD bit */
apcr |= MPMU_PCR_PJ_DDRCORSD; /* set DDRCORSD bit */ apcr |= MPMU_PCR_PJ_DDRCORSD; /* set DDRCORSD bit */
idle_cfg |= APMU_PJ_IDLE_CFG_PJ_PWRDWN; /* PJ power down */ idle_cfg |= APMU_PJ_IDLE_CFG_PJ_PWRDWN; /* PJ power down */
apcr |= MPMU_PCR_PJ_SPSD; apcr |= MPMU_PCR_PJ_SPSD;
/* fall through */ fallthrough;
case POWER_MODE_CORE_EXTIDLE: case POWER_MODE_CORE_EXTIDLE:
idle_cfg |= APMU_PJ_IDLE_CFG_PJ_IDLE; /* set the IDLE bit */ idle_cfg |= APMU_PJ_IDLE_CFG_PJ_IDLE; /* set the IDLE bit */
idle_cfg &= ~APMU_PJ_IDLE_CFG_ISO_MODE_CNTRL_MASK; idle_cfg &= ~APMU_PJ_IDLE_CFG_ISO_MODE_CNTRL_MASK;

10
arch/arm/mach-mmp/pm-pxa910.c
View File

@ -145,23 +145,23 @@ void pxa910_pm_enter_lowpower_mode(int state)
case POWER_MODE_UDR: case POWER_MODE_UDR:
/* only shutdown APB in UDR */ /* only shutdown APB in UDR */
apcr |= MPMU_APCR_STBYEN | MPMU_APCR_APBSD; apcr |= MPMU_APCR_STBYEN | MPMU_APCR_APBSD;
/* fall through */ fallthrough;
case POWER_MODE_SYS_SLEEP: case POWER_MODE_SYS_SLEEP:
apcr |= MPMU_APCR_SLPEN; /* set the SLPEN bit */ apcr |= MPMU_APCR_SLPEN; /* set the SLPEN bit */
apcr |= MPMU_APCR_VCTCXOSD; /* set VCTCXOSD */ apcr |= MPMU_APCR_VCTCXOSD; /* set VCTCXOSD */
/* fall through */ fallthrough;
case POWER_MODE_APPS_SLEEP: case POWER_MODE_APPS_SLEEP:
apcr |= MPMU_APCR_DDRCORSD; /* set DDRCORSD */ apcr |= MPMU_APCR_DDRCORSD; /* set DDRCORSD */
/* fall through */ fallthrough;
case POWER_MODE_APPS_IDLE: case POWER_MODE_APPS_IDLE:
apcr |= MPMU_APCR_AXISD; /* set AXISDD bit */ apcr |= MPMU_APCR_AXISD; /* set AXISDD bit */
/* fall through */ fallthrough;
case POWER_MODE_CORE_EXTIDLE: case POWER_MODE_CORE_EXTIDLE:
idle_cfg |= APMU_MOH_IDLE_CFG_MOH_IDLE; idle_cfg |= APMU_MOH_IDLE_CFG_MOH_IDLE;
idle_cfg |= APMU_MOH_IDLE_CFG_MOH_PWRDWN; idle_cfg |= APMU_MOH_IDLE_CFG_MOH_PWRDWN;
idle_cfg |= APMU_MOH_IDLE_CFG_MOH_PWR_SW(3) idle_cfg |= APMU_MOH_IDLE_CFG_MOH_PWR_SW(3)
| APMU_MOH_IDLE_CFG_MOH_L2_PWR_SW(3); | APMU_MOH_IDLE_CFG_MOH_L2_PWR_SW(3);
/* fall through */ fallthrough;
case POWER_MODE_CORE_INTIDLE: case POWER_MODE_CORE_INTIDLE:
break; break;
} }

8
arch/arm/mach-omap2/id.c
View File

@ -396,7 +396,6 @@ void __init omap3xxx_check_revision(void)
cpu_rev = "3.1"; cpu_rev = "3.1";
break; break;
case 7: case 7:
/* FALLTHROUGH */
default: default:
/* Use the latest known revision as default */ /* Use the latest known revision as default */
omap_revision = OMAP3430_REV_ES3_1_2; omap_revision = OMAP3430_REV_ES3_1_2;
@ -416,7 +415,6 @@ void __init omap3xxx_check_revision(void)
cpu_rev = "1.0"; cpu_rev = "1.0";
break; break;
case 1: case 1:
/* FALLTHROUGH */
default: default:
omap_revision = AM35XX_REV_ES1_1; omap_revision = AM35XX_REV_ES1_1;
cpu_rev = "1.1"; cpu_rev = "1.1";
@ -435,7 +433,6 @@ void __init omap3xxx_check_revision(void)
cpu_rev = "1.1"; cpu_rev = "1.1";
break; break;
case 2: case 2:
/* FALLTHROUGH */
default: default:
omap_revision = OMAP3630_REV_ES1_2; omap_revision = OMAP3630_REV_ES1_2;
cpu_rev = "1.2"; cpu_rev = "1.2";
@ -456,7 +453,6 @@ void __init omap3xxx_check_revision(void)
cpu_rev = "2.0"; cpu_rev = "2.0";
break; break;
case 3: case 3:
/* FALLTHROUGH */
default: default:
omap_revision = TI8168_REV_ES2_1; omap_revision = TI8168_REV_ES2_1;
cpu_rev = "2.1"; cpu_rev = "2.1";
@ -473,7 +469,6 @@ void __init omap3xxx_check_revision(void)
cpu_rev = "2.0"; cpu_rev = "2.0";
break; break;
case 2: case 2:
/* FALLTHROUGH */
default: default:
omap_revision = AM335X_REV_ES2_1; omap_revision = AM335X_REV_ES2_1;
cpu_rev = "2.1"; cpu_rev = "2.1";
@ -491,7 +486,6 @@ void __init omap3xxx_check_revision(void)
cpu_rev = "1.1"; cpu_rev = "1.1";
break; break;
case 2: case 2:
/* FALLTHROUGH */
default: default:
omap_revision = AM437X_REV_ES1_2; omap_revision = AM437X_REV_ES1_2;
cpu_rev = "1.2"; cpu_rev = "1.2";
@ -502,7 +496,6 @@ void __init omap3xxx_check_revision(void)
case 0xb968: case 0xb968:
switch (rev) { switch (rev) {
case 0: case 0:
/* FALLTHROUGH */
case 1: case 1:
omap_revision = TI8148_REV_ES1_0; omap_revision = TI8148_REV_ES1_0;
cpu_rev = "1.0"; cpu_rev = "1.0";
@ -512,7 +505,6 @@ void __init omap3xxx_check_revision(void)
cpu_rev = "2.0"; cpu_rev = "2.0";
break; break;
case 3: case 3:
/* FALLTHROUGH */
default: default:
omap_revision = TI8148_REV_ES2_1; omap_revision = TI8148_REV_ES2_1;
cpu_rev = "2.1"; cpu_rev = "2.1";

2
arch/arm/mach-omap2/omap_device.c
View File

@ -240,7 +240,7 @@ static int _omap_device_notifier_call(struct notifier_block *nb,
if (pdev->dev.of_node) if (pdev->dev.of_node)
omap_device_build_from_dt(pdev); omap_device_build_from_dt(pdev);
omap_auxdata_legacy_init(dev); omap_auxdata_legacy_init(dev);
/* fall through */ fallthrough;
default: default:
od = to_omap_device(pdev); od = to_omap_device(pdev);
if (od) if (od)

2
arch/arm/mach-orion5x/dns323-setup.c
View File

@ -624,7 +624,7 @@ static void __init dns323_init(void)
dns323ab_leds[0].active_low = 1; dns323ab_leds[0].active_low = 1;
gpio_request(DNS323_GPIO_LED_POWER1, "Power Led Enable"); gpio_request(DNS323_GPIO_LED_POWER1, "Power Led Enable");
gpio_direction_output(DNS323_GPIO_LED_POWER1, 0); gpio_direction_output(DNS323_GPIO_LED_POWER1, 0);
/* Fall through */ fallthrough;
case DNS323_REV_B1: case DNS323_REV_B1:
i2c_register_board_info(0, dns323ab_i2c_devices, i2c_register_board_info(0, dns323ab_i2c_devices,
ARRAY_SIZE(dns323ab_i2c_devices)); ARRAY_SIZE(dns323ab_i2c_devices));

2
arch/arm/mach-rpc/riscpc.c
View File

@ -46,7 +46,7 @@ static int __init parse_tag_acorn(const struct tag *tag)
switch (tag->u.acorn.vram_pages) { switch (tag->u.acorn.vram_pages) {
case 512: case 512:
vram_size += PAGE_SIZE * 256; vram_size += PAGE_SIZE * 256;
/* Fall through - ??? */ fallthrough; /* ??? */
case 256: case 256:
vram_size += PAGE_SIZE * 256; vram_size += PAGE_SIZE * 256;
default: default:

2
arch/arm/mach-tegra/reset.c
View File

@ -70,7 +70,7 @@ static void __init tegra_cpu_reset_handler_enable(void)
switch (err) { switch (err) {
case -ENOSYS: case -ENOSYS:
tegra_cpu_reset_handler_set(reset_address); tegra_cpu_reset_handler_set(reset_address);
/* fall through */ fallthrough;
case 0: case 0:
is_enabled = true; is_enabled = true;
break; break;

4
arch/arm/mm/alignment.c
View File

@ -694,7 +694,7 @@ thumb2arm(u16 tinstr)
return subset[(L<<1) | ((tinstr & (1<<8)) >> 8)] | return subset[(L<<1) | ((tinstr & (1<<8)) >> 8)] |
(tinstr & 255); /* register_list */ (tinstr & 255); /* register_list */
} }
/* Else, fall through - for illegal instruction case */ fallthrough; /* for illegal instruction case */
default: default:
return BAD_INSTR; return BAD_INSTR;
@ -750,7 +750,7 @@ do_alignment_t32_to_handler(u32 *pinstr, struct pt_regs *regs,
case 0xe8e0: case 0xe8e0:
case 0xe9e0: case 0xe9e0:
poffset->un = (tinst2 & 0xff) << 2; poffset->un = (tinst2 & 0xff) << 2;
/* Fall through */ fallthrough;
case 0xe940: case 0xe940:
case 0xe9c0: case 0xe9c0:

2
arch/arm/mm/proc-v7-bugs.c
View File

@ -71,7 +71,7 @@ static void cpu_v7_spectre_init(void)
/* Other ARM CPUs require no workaround */ /* Other ARM CPUs require no workaround */
if (read_cpuid_implementor() == ARM_CPU_IMP_ARM) if (read_cpuid_implementor() == ARM_CPU_IMP_ARM)
break; break;
/* fallthrough */ fallthrough;
/* Cortex A57/A72 require firmware workaround */ /* Cortex A57/A72 require firmware workaround */
case ARM_CPU_PART_CORTEX_A57: case ARM_CPU_PART_CORTEX_A57:
case ARM_CPU_PART_CORTEX_A72: { case ARM_CPU_PART_CORTEX_A72: {

6
arch/arm/plat-omap/dma.c
View File

@ -309,14 +309,14 @@ void omap_set_dma_src_burst_mode(int lch, enum omap_dma_burst_mode burst_mode)
* not supported by current hardware on OMAP1 * not supported by current hardware on OMAP1
* w |= (0x03 << 7); * w |= (0x03 << 7);
*/ */
/* fall through */ fallthrough;
case OMAP_DMA_DATA_BURST_16: case OMAP_DMA_DATA_BURST_16:
if (dma_omap2plus()) { if (dma_omap2plus()) {
burst = 0x3; burst = 0x3;
break; break;
} }
/* OMAP1 don't support burst 16 */ /* OMAP1 don't support burst 16 */
/* fall through */ fallthrough;
default: default:
BUG(); BUG();
} }
@ -393,7 +393,7 @@ void omap_set_dma_dest_burst_mode(int lch, enum omap_dma_burst_mode burst_mode)
break; break;
} }
/* OMAP1 don't support burst 16 */ /* OMAP1 don't support burst 16 */
/* fall through */ fallthrough;
default: default:
printk(KERN_ERR "Invalid DMA burst mode\n"); printk(KERN_ERR "Invalid DMA burst mode\n");
BUG(); BUG();

2
arch/arm/probes/decode.c
View File

@ -307,7 +307,7 @@ static bool __kprobes decode_regs(probes_opcode_t *pinsn, u32 regs, bool modify)
case REG_TYPE_NOPCWB: case REG_TYPE_NOPCWB:
if (!is_writeback(insn)) if (!is_writeback(insn))
break; /* No writeback, so any register is OK */ break; /* No writeback, so any register is OK */
/* fall through... */ fallthrough;
case REG_TYPE_NOPC: case REG_TYPE_NOPC:
case REG_TYPE_NOPCX: case REG_TYPE_NOPCX:
/* Reject PC (R15) */ /* Reject PC (R15) */

2
arch/arm/probes/kprobes/core.c
View File

@ -280,7 +280,7 @@ void __kprobes kprobe_handler(struct pt_regs *regs)
/* A nested probe was hit in FIQ, it is a BUG */ /* A nested probe was hit in FIQ, it is a BUG */
pr_warn("Unrecoverable kprobe detected.\n"); pr_warn("Unrecoverable kprobe detected.\n");
dump_kprobe(p); dump_kprobe(p);
/* fall through */ fallthrough;
default: default:
/* impossible cases */ /* impossible cases */
BUG(); BUG();

2
arch/arm64/kernel/acpi.c
View File

@ -322,7 +322,7 @@ void __iomem *acpi_os_ioremap(acpi_physical_address phys, acpi_size size)
*/ */
if (memblock_is_map_memory(phys)) if (memblock_is_map_memory(phys))
return (void __iomem *)__phys_to_virt(phys); return (void __iomem *)__phys_to_virt(phys);
/* fall through */ fallthrough;
default: default:
if (region->attribute & EFI_MEMORY_WB) if (region->attribute & EFI_MEMORY_WB)

2
arch/arm64/kernel/cpufeature.c
View File

@ -686,7 +686,7 @@ static s64 arm64_ftr_safe_value(const struct arm64_ftr_bits *ftrp, s64 new,
case FTR_HIGHER_OR_ZERO_SAFE: case FTR_HIGHER_OR_ZERO_SAFE:
if (!cur || !new) if (!cur || !new)
break; break;
/* Fallthrough */ fallthrough;
case FTR_HIGHER_SAFE: case FTR_HIGHER_SAFE:
ret = new > cur ? new : cur; ret = new > cur ? new : cur;
break; break;

2
arch/arm64/kernel/cpuinfo.c
View File

@ -327,7 +327,7 @@ static void cpuinfo_detect_icache_policy(struct cpuinfo_arm64 *info)
set_bit(ICACHEF_VPIPT, &__icache_flags); set_bit(ICACHEF_VPIPT, &__icache_flags);
break; break;
default: default:
/* Fallthrough */ fallthrough;
case ICACHE_POLICY_VIPT: case ICACHE_POLICY_VIPT:
/* Assume aliasing */ /* Assume aliasing */
set_bit(ICACHEF_ALIASING, &__icache_flags); set_bit(ICACHEF_ALIASING, &__icache_flags);

6
arch/arm64/kernel/hw_breakpoint.c
View File

@ -257,7 +257,7 @@ static int hw_breakpoint_control(struct perf_event *bp,
* level. * level.
*/ */
enable_debug_monitors(dbg_el); enable_debug_monitors(dbg_el);
/* Fall through */ fallthrough;
case HW_BREAKPOINT_RESTORE: case HW_BREAKPOINT_RESTORE:
/* Setup the address register. */ /* Setup the address register. */
write_wb_reg(val_reg, i, info->address); write_wb_reg(val_reg, i, info->address);
@ -541,13 +541,13 @@ int hw_breakpoint_arch_parse(struct perf_event *bp,
if (hw->ctrl.len == ARM_BREAKPOINT_LEN_2) if (hw->ctrl.len == ARM_BREAKPOINT_LEN_2)
break; break;
/* Fallthrough */ fallthrough;
case 3: case 3:
/* Allow single byte watchpoint. */ /* Allow single byte watchpoint. */
if (hw->ctrl.len == ARM_BREAKPOINT_LEN_1) if (hw->ctrl.len == ARM_BREAKPOINT_LEN_1)
break; break;
/* Fallthrough */ fallthrough;
default: default:
return -EINVAL; return -EINVAL;
} }

8
arch/arm64/kernel/module.c
View File

@ -315,21 +315,21 @@ int apply_relocate_add(Elf64_Shdr *sechdrs,
/* MOVW instruction relocations. */ /* MOVW instruction relocations. */
case R_AARCH64_MOVW_UABS_G0_NC: case R_AARCH64_MOVW_UABS_G0_NC:
overflow_check = false; overflow_check = false;
/* Fall through */ fallthrough;
case R_AARCH64_MOVW_UABS_G0: case R_AARCH64_MOVW_UABS_G0:
ovf = reloc_insn_movw(RELOC_OP_ABS, loc, val, 0, ovf = reloc_insn_movw(RELOC_OP_ABS, loc, val, 0,
AARCH64_INSN_IMM_MOVKZ); AARCH64_INSN_IMM_MOVKZ);
break; break;
case R_AARCH64_MOVW_UABS_G1_NC: case R_AARCH64_MOVW_UABS_G1_NC:
overflow_check = false; overflow_check = false;
/* Fall through */ fallthrough;
case R_AARCH64_MOVW_UABS_G1: case R_AARCH64_MOVW_UABS_G1:
ovf = reloc_insn_movw(RELOC_OP_ABS, loc, val, 16, ovf = reloc_insn_movw(RELOC_OP_ABS, loc, val, 16,
AARCH64_INSN_IMM_MOVKZ); AARCH64_INSN_IMM_MOVKZ);
break; break;
case R_AARCH64_MOVW_UABS_G2_NC: case R_AARCH64_MOVW_UABS_G2_NC:
overflow_check = false; overflow_check = false;
/* Fall through */ fallthrough;
case R_AARCH64_MOVW_UABS_G2: case R_AARCH64_MOVW_UABS_G2:
ovf = reloc_insn_movw(RELOC_OP_ABS, loc, val, 32, ovf = reloc_insn_movw(RELOC_OP_ABS, loc, val, 32,
AARCH64_INSN_IMM_MOVKZ); AARCH64_INSN_IMM_MOVKZ);
@ -397,7 +397,7 @@ int apply_relocate_add(Elf64_Shdr *sechdrs,
break; break;
case R_AARCH64_ADR_PREL_PG_HI21_NC: case R_AARCH64_ADR_PREL_PG_HI21_NC:
overflow_check = false; overflow_check = false;
/* Fall through */ fallthrough;
case R_AARCH64_ADR_PREL_PG_HI21: case R_AARCH64_ADR_PREL_PG_HI21:
ovf = reloc_insn_adrp(me, sechdrs, loc, val); ovf = reloc_insn_adrp(me, sechdrs, loc, val);
if (ovf && ovf != -ERANGE) if (ovf && ovf != -ERANGE)

2
arch/arm64/kernel/smp.c
View File

@ -151,7 +151,7 @@ int __cpu_up(unsigned int cpu, struct task_struct *idle)
break; break;
} }
pr_crit("CPU%u: may not have shut down cleanly\n", cpu); pr_crit("CPU%u: may not have shut down cleanly\n", cpu);
/* Fall through */ fallthrough;
case CPU_STUCK_IN_KERNEL: case CPU_STUCK_IN_KERNEL:
pr_crit("CPU%u: is stuck in kernel\n", cpu); pr_crit("CPU%u: is stuck in kernel\n", cpu);
if (status & CPU_STUCK_REASON_52_BIT_VA) if (status & CPU_STUCK_REASON_52_BIT_VA)

2
arch/arm64/kvm/handle_exit.c
View File

@ -128,7 +128,7 @@ static int kvm_handle_guest_debug(struct kvm_vcpu *vcpu)
switch (ESR_ELx_EC(esr)) { switch (ESR_ELx_EC(esr)) {
case ESR_ELx_EC_WATCHPT_LOW: case ESR_ELx_EC_WATCHPT_LOW:
run->debug.arch.far = vcpu->arch.fault.far_el2; run->debug.arch.far = vcpu->arch.fault.far_el2;
/* fall through */ fallthrough;
case ESR_ELx_EC_SOFTSTP_LOW: case ESR_ELx_EC_SOFTSTP_LOW:
case ESR_ELx_EC_BREAKPT_LOW: case ESR_ELx_EC_BREAKPT_LOW:
case ESR_ELx_EC_BKPT32: case ESR_ELx_EC_BKPT32:

60
arch/arm64/kvm/hyp/include/hyp/debug-sr.h
View File

@ -21,70 +21,70 @@
#define save_debug(ptr,reg,nr) \ #define save_debug(ptr,reg,nr) \
switch (nr) { \ switch (nr) { \
case 15: ptr[15] = read_debug(reg, 15); \ case 15: ptr[15] = read_debug(reg, 15); \
/* Fall through */ \ fallthrough; \
case 14: ptr[14] = read_debug(reg, 14); \ case 14: ptr[14] = read_debug(reg, 14); \
/* Fall through */ \ fallthrough; \
case 13: ptr[13] = read_debug(reg, 13); \ case 13: ptr[13] = read_debug(reg, 13); \
/* Fall through */ \ fallthrough; \
case 12: ptr[12] = read_debug(reg, 12); \ case 12: ptr[12] = read_debug(reg, 12); \
/* Fall through */ \ fallthrough; \
case 11: ptr[11] = read_debug(reg, 11); \ case 11: ptr[11] = read_debug(reg, 11); \
/* Fall through */ \ fallthrough; \
case 10: ptr[10] = read_debug(reg, 10); \ case 10: ptr[10] = read_debug(reg, 10); \
/* Fall through */ \ fallthrough; \
case 9: ptr[9] = read_debug(reg, 9); \ case 9: ptr[9] = read_debug(reg, 9); \
/* Fall through */ \ fallthrough; \
case 8: ptr[8] = read_debug(reg, 8); \ case 8: ptr[8] = read_debug(reg, 8); \
/* Fall through */ \ fallthrough; \
case 7: ptr[7] = read_debug(reg, 7); \ case 7: ptr[7] = read_debug(reg, 7); \
/* Fall through */ \ fallthrough; \
case 6: ptr[6] = read_debug(reg, 6); \ case 6: ptr[6] = read_debug(reg, 6); \
/* Fall through */ \ fallthrough; \
case 5: ptr[5] = read_debug(reg, 5); \ case 5: ptr[5] = read_debug(reg, 5); \
/* Fall through */ \ fallthrough; \
case 4: ptr[4] = read_debug(reg, 4); \ case 4: ptr[4] = read_debug(reg, 4); \
/* Fall through */ \ fallthrough; \
case 3: ptr[3] = read_debug(reg, 3); \ case 3: ptr[3] = read_debug(reg, 3); \
/* Fall through */ \ fallthrough; \
case 2: ptr[2] = read_debug(reg, 2); \ case 2: ptr[2] = read_debug(reg, 2); \
/* Fall through */ \ fallthrough; \
case 1: ptr[1] = read_debug(reg, 1); \ case 1: ptr[1] = read_debug(reg, 1); \
/* Fall through */ \ fallthrough; \
default: ptr[0] = read_debug(reg, 0); \ default: ptr[0] = read_debug(reg, 0); \
} }
#define restore_debug(ptr,reg,nr) \ #define restore_debug(ptr,reg,nr) \
switch (nr) { \ switch (nr) { \
case 15: write_debug(ptr[15], reg, 15); \ case 15: write_debug(ptr[15], reg, 15); \
/* Fall through */ \ fallthrough; \
case 14: write_debug(ptr[14], reg, 14); \ case 14: write_debug(ptr[14], reg, 14); \
/* Fall through */ \ fallthrough; \
case 13: write_debug(ptr[13], reg, 13); \ case 13: write_debug(ptr[13], reg, 13); \
/* Fall through */ \ fallthrough; \
case 12: write_debug(ptr[12], reg, 12); \ case 12: write_debug(ptr[12], reg, 12); \
/* Fall through */ \ fallthrough; \
case 11: write_debug(ptr[11], reg, 11); \ case 11: write_debug(ptr[11], reg, 11); \
/* Fall through */ \ fallthrough; \
case 10: write_debug(ptr[10], reg, 10); \ case 10: write_debug(ptr[10], reg, 10); \
/* Fall through */ \ fallthrough; \
case 9: write_debug(ptr[9], reg, 9); \ case 9: write_debug(ptr[9], reg, 9); \
/* Fall through */ \ fallthrough; \
case 8: write_debug(ptr[8], reg, 8); \ case 8: write_debug(ptr[8], reg, 8); \
/* Fall through */ \ fallthrough; \
case 7: write_debug(ptr[7], reg, 7); \ case 7: write_debug(ptr[7], reg, 7); \
/* Fall through */ \ fallthrough; \
case 6: write_debug(ptr[6], reg, 6); \ case 6: write_debug(ptr[6], reg, 6); \
/* Fall through */ \ fallthrough; \
case 5: write_debug(ptr[5], reg, 5); \ case 5: write_debug(ptr[5], reg, 5); \
/* Fall through */ \ fallthrough; \
case 4: write_debug(ptr[4], reg, 4); \ case 4: write_debug(ptr[4], reg, 4); \
/* Fall through */ \ fallthrough; \
case 3: write_debug(ptr[3], reg, 3); \ case 3: write_debug(ptr[3], reg, 3); \
/* Fall through */ \ fallthrough; \
case 2: write_debug(ptr[2], reg, 2); \ case 2: write_debug(ptr[2], reg, 2); \
/* Fall through */ \ fallthrough; \
case 1: write_debug(ptr[1], reg, 1); \ case 1: write_debug(ptr[1], reg, 1); \
/* Fall through */ \ fallthrough; \
default: write_debug(ptr[0], reg, 0); \ default: write_debug(ptr[0], reg, 0); \
} }

16
arch/arm64/kvm/hyp/vgic-v3-sr.c
View File

@ -340,10 +340,10 @@ void __vgic_v3_save_aprs(struct vgic_v3_cpu_if *cpu_if)
case 7: case 7:
cpu_if->vgic_ap0r[3] = __vgic_v3_read_ap0rn(3); cpu_if->vgic_ap0r[3] = __vgic_v3_read_ap0rn(3);
cpu_if->vgic_ap0r[2] = __vgic_v3_read_ap0rn(2); cpu_if->vgic_ap0r[2] = __vgic_v3_read_ap0rn(2);
/* Fall through */ fallthrough;
case 6: case 6:
cpu_if->vgic_ap0r[1] = __vgic_v3_read_ap0rn(1); cpu_if->vgic_ap0r[1] = __vgic_v3_read_ap0rn(1);
/* Fall through */ fallthrough;
default: default:
cpu_if->vgic_ap0r[0] = __vgic_v3_read_ap0rn(0); cpu_if->vgic_ap0r[0] = __vgic_v3_read_ap0rn(0);
} }
@ -352,10 +352,10 @@ void __vgic_v3_save_aprs(struct vgic_v3_cpu_if *cpu_if)
case 7: case 7:
cpu_if->vgic_ap1r[3] = __vgic_v3_read_ap1rn(3); cpu_if->vgic_ap1r[3] = __vgic_v3_read_ap1rn(3);
cpu_if->vgic_ap1r[2] = __vgic_v3_read_ap1rn(2); cpu_if->vgic_ap1r[2] = __vgic_v3_read_ap1rn(2);
/* Fall through */ fallthrough;
case 6: case 6:
cpu_if->vgic_ap1r[1] = __vgic_v3_read_ap1rn(1); cpu_if->vgic_ap1r[1] = __vgic_v3_read_ap1rn(1);
/* Fall through */ fallthrough;
default: default:
cpu_if->vgic_ap1r[0] = __vgic_v3_read_ap1rn(0); cpu_if->vgic_ap1r[0] = __vgic_v3_read_ap1rn(0);
} }
@ -373,10 +373,10 @@ void __vgic_v3_restore_aprs(struct vgic_v3_cpu_if *cpu_if)
case 7: case 7:
__vgic_v3_write_ap0rn(cpu_if->vgic_ap0r[3], 3); __vgic_v3_write_ap0rn(cpu_if->vgic_ap0r[3], 3);
__vgic_v3_write_ap0rn(cpu_if->vgic_ap0r[2], 2); __vgic_v3_write_ap0rn(cpu_if->vgic_ap0r[2], 2);
/* Fall through */ fallthrough;
case 6: case 6:
__vgic_v3_write_ap0rn(cpu_if->vgic_ap0r[1], 1); __vgic_v3_write_ap0rn(cpu_if->vgic_ap0r[1], 1);
/* Fall through */ fallthrough;
default: default:
__vgic_v3_write_ap0rn(cpu_if->vgic_ap0r[0], 0); __vgic_v3_write_ap0rn(cpu_if->vgic_ap0r[0], 0);
} }
@ -385,10 +385,10 @@ void __vgic_v3_restore_aprs(struct vgic_v3_cpu_if *cpu_if)
case 7: case 7:
__vgic_v3_write_ap1rn(cpu_if->vgic_ap1r[3], 3); __vgic_v3_write_ap1rn(cpu_if->vgic_ap1r[3], 3);
__vgic_v3_write_ap1rn(cpu_if->vgic_ap1r[2], 2); __vgic_v3_write_ap1rn(cpu_if->vgic_ap1r[2], 2);
/* Fall through */ fallthrough;
case 6: case 6:
__vgic_v3_write_ap1rn(cpu_if->vgic_ap1r[1], 1); __vgic_v3_write_ap1rn(cpu_if->vgic_ap1r[1], 1);
/* Fall through */ fallthrough;
default: default:
__vgic_v3_write_ap1rn(cpu_if->vgic_ap1r[0], 0); __vgic_v3_write_ap1rn(cpu_if->vgic_ap1r[0], 0);
} }

2
arch/arm64/mm/context.c
View File

@ -45,7 +45,7 @@ static u32 get_cpu_asid_bits(void)
default: default:
pr_warn("CPU%d: Unknown ASID size (%d); assuming 8-bit\n", pr_warn("CPU%d: Unknown ASID size (%d); assuming 8-bit\n",
smp_processor_id(), fld); smp_processor_id(), fld);
/* Fallthrough */ fallthrough;
case 0: case 0:
asid = 8; asid = 8;
break; break;

4
arch/c6x/kernel/signal.c
View File

@ -220,7 +220,7 @@ handle_restart(struct pt_regs *regs, struct k_sigaction *ka, int has_handler)
regs->a4 = -EINTR; regs->a4 = -EINTR;
break; break;
} }
/* fallthrough */ fallthrough;
case -ERESTARTNOINTR: case -ERESTARTNOINTR:
do_restart: do_restart:
regs->a4 = regs->orig_a4; regs->a4 = regs->orig_a4;
@ -252,7 +252,7 @@ static void handle_signal(struct ksignal *ksig, struct pt_regs *regs,
break; break;
} }
/* fallthrough */ fallthrough;
case -ERESTARTNOINTR: case -ERESTARTNOINTR:
regs->a4 = regs->orig_a4; regs->a4 = regs->orig_a4;
regs->pc -= 4; regs->pc -= 4;

2
arch/csky/kernel/signal.c
View File

@ -194,7 +194,7 @@ static void handle_signal(struct ksignal *ksig, struct pt_regs *regs)
regs->a0 = -EINTR; regs->a0 = -EINTR;
break; break;
} }
/* fallthrough */ fallthrough;
case -ERESTARTNOINTR: case -ERESTARTNOINTR:
regs->a0 = regs->orig_a0; regs->a0 = regs->orig_a0;
regs->pc -= TRAP0_SIZE; regs->pc -= TRAP0_SIZE;

2
arch/h8300/kernel/signal.c
View File

@ -227,7 +227,7 @@ handle_restart(struct pt_regs *regs, struct k_sigaction *ka)
regs->er0 = -EINTR; regs->er0 = -EINTR;
break; break;
} }
/* fallthrough */ fallthrough;
case -ERESTARTNOINTR: case -ERESTARTNOINTR:
do_restart: do_restart:
regs->er0 = regs->orig_er0; regs->er0 = regs->orig_er0;

2
arch/hexagon/kernel/module.c
View File

@ -120,7 +120,7 @@ int apply_relocate_add(Elf_Shdr *sechdrs, const char *strtab,
} }
case R_HEXAGON_HI16: case R_HEXAGON_HI16:
value = (value>>16) & 0xffff; value = (value>>16) & 0xffff;
/* fallthrough */ fallthrough;
case R_HEXAGON_LO16: case R_HEXAGON_LO16:
*location &= ~0x00c03fff; *location &= ~0x00c03fff;
*location |= value & 0x3fff; *location |= value & 0x3fff;

2
arch/hexagon/kernel/signal.c
View File

@ -155,7 +155,7 @@ static void handle_signal(struct ksignal *ksig, struct pt_regs *regs)
regs->r00 = -EINTR; regs->r00 = -EINTR;
break; break;
} }
/* Fall through */ fallthrough;
case -ERESTARTNOINTR: case -ERESTARTNOINTR:
regs->r06 = regs->syscall_nr; regs->r06 = regs->syscall_nr;
pt_set_elr(regs, pt_elr(regs) - 4); pt_set_elr(regs, pt_elr(regs) - 4);

2
arch/ia64/kernel/crash.c
View File

@ -163,7 +163,7 @@ kdump_init_notifier(struct notifier_block *self, unsigned long val, void *data)
case DIE_INIT_MONARCH_LEAVE: case DIE_INIT_MONARCH_LEAVE:
if (!kdump_freeze_monarch) if (!kdump_freeze_monarch)
break; break;
/* fall through */ fallthrough;
case DIE_INIT_SLAVE_LEAVE: case DIE_INIT_SLAVE_LEAVE:
case DIE_INIT_MONARCH_ENTER: case DIE_INIT_MONARCH_ENTER:
case DIE_MCA_RENDZVOUS_LEAVE: case DIE_MCA_RENDZVOUS_LEAVE:

2
arch/ia64/kernel/module.c
View File

@ -654,7 +654,7 @@ do_reloc (struct module *mod, uint8_t r_type, Elf64_Sym *sym, uint64_t addend,
} }
} else if (!is_internal(mod, val)) } else if (!is_internal(mod, val))
val = get_plt(mod, location, val, &ok); val = get_plt(mod, location, val, &ok);
/* FALL THROUGH */ fallthrough;
default: default:
val -= bundle(location); val -= bundle(location);
break; break;

2
arch/ia64/kernel/perfmon.c
View File

@ -3472,7 +3472,7 @@ pfm_restart(pfm_context_t *ctx, void *arg, int count, struct pt_regs *regs)
break; break;
case PFM_CTX_LOADED: case PFM_CTX_LOADED:
if (CTX_HAS_SMPL(ctx) && fmt->fmt_restart_active) break; if (CTX_HAS_SMPL(ctx) && fmt->fmt_restart_active) break;
/* fall through */ fallthrough;
case PFM_CTX_UNLOADED: case PFM_CTX_UNLOADED:
case PFM_CTX_ZOMBIE: case PFM_CTX_ZOMBIE:
DPRINT(("invalid state=%d\n", state)); DPRINT(("invalid state=%d\n", state));

2
arch/ia64/kernel/signal.c
View File

@ -374,7 +374,7 @@ ia64_do_signal (struct sigscratch *scr, long in_syscall)
/* note: scr->pt.r10 is already -1 */ /* note: scr->pt.r10 is already -1 */
break; break;
} }
/*FALLTHRU*/ fallthrough;
case ERESTARTNOINTR: case ERESTARTNOINTR:
ia64_decrement_ip(&scr->pt); ia64_decrement_ip(&scr->pt);
restart = 0; /* don't restart twice if handle_signal() fails... */ restart = 0; /* don't restart twice if handle_signal() fails... */

6
arch/ia64/kernel/unaligned.c
View File

@ -1431,7 +1431,7 @@ ia64_handle_unaligned (unsigned long ifa, struct pt_regs *regs)
if (u.insn.x) if (u.insn.x)
/* oops, really a semaphore op (cmpxchg, etc) */ /* oops, really a semaphore op (cmpxchg, etc) */
goto failure; goto failure;
/*FALLTHRU*/ fallthrough;
case LDS_IMM_OP: case LDS_IMM_OP:
case LDSA_IMM_OP: case LDSA_IMM_OP:
case LDFS_OP: case LDFS_OP:
@ -1459,7 +1459,7 @@ ia64_handle_unaligned (unsigned long ifa, struct pt_regs *regs)
if (u.insn.x) if (u.insn.x)
/* oops, really a semaphore op (cmpxchg, etc) */ /* oops, really a semaphore op (cmpxchg, etc) */
goto failure; goto failure;
/*FALLTHRU*/ fallthrough;
case LD_IMM_OP: case LD_IMM_OP:
case LDA_IMM_OP: case LDA_IMM_OP:
case LDBIAS_IMM_OP: case LDBIAS_IMM_OP:
@ -1475,7 +1475,7 @@ ia64_handle_unaligned (unsigned long ifa, struct pt_regs *regs)
if (u.insn.x) if (u.insn.x)
/* oops, really a semaphore op (cmpxchg, etc) */ /* oops, really a semaphore op (cmpxchg, etc) */
goto failure; goto failure;
/*FALLTHRU*/ fallthrough;
case ST_IMM_OP: case ST_IMM_OP:
case STREL_IMM_OP: case STREL_IMM_OP:
ret = emulate_store_int(ifa, u.insn, regs); ret = emulate_store_int(ifa, u.insn, regs);

2
arch/ia64/kernel/unwind.c
View File

@ -324,7 +324,7 @@ unw_access_gr (struct unw_frame_info *info, int regnum, unsigned long *val, char
return 0; return 0;
} }
} }
/* fall through */ fallthrough;
case UNW_NAT_NONE: case UNW_NAT_NONE:
dummy_nat = 0; dummy_nat = 0;
nat_addr = &dummy_nat; nat_addr = &dummy_nat;

2
arch/m68k/atari/atakeyb.c
View File

@ -207,7 +207,7 @@ static irqreturn_t atari_keyboard_interrupt(int irq, void *dummy)
self_test_last_rcv = jiffies; self_test_last_rcv = jiffies;
break; break;
} }
/* FALL THROUGH */ fallthrough;
default: default:
break_flag = scancode & BREAK_MASK; break_flag = scancode & BREAK_MASK;

2
arch/m68k/kernel/signal.c
View File

@ -1067,7 +1067,7 @@ handle_restart(struct pt_regs *regs, struct k_sigaction *ka, int has_handler)
regs->d0 = -EINTR; regs->d0 = -EINTR;
break; break;
} }
/* fallthrough */ fallthrough;
case -ERESTARTNOINTR: case -ERESTARTNOINTR:
do_restart: do_restart:
regs->d0 = regs->orig_d0; regs->d0 = regs->orig_d0;

2
arch/m68k/mac/config.c
View File

@ -1018,7 +1018,7 @@ int __init mac_platform_init(void)
*/ */
platform_device_register_simple("mac_scsi", 1, platform_device_register_simple("mac_scsi", 1,
mac_scsi_duo_rsrc, ARRAY_SIZE(mac_scsi_duo_rsrc)); mac_scsi_duo_rsrc, ARRAY_SIZE(mac_scsi_duo_rsrc));
/* fall through */ fallthrough;
case MAC_SCSI_OLD: case MAC_SCSI_OLD:
/* Addresses from Developer Notes for Duo System, /* Addresses from Developer Notes for Duo System,
* PowerBook 180 & 160, 140 & 170, Macintosh IIsi * PowerBook 180 & 160, 140 & 170, Macintosh IIsi

2
arch/m68k/mac/via.c
View File

@ -370,7 +370,7 @@ void via_nubus_irq_startup(int irq)
/* Allow NuBus slots 9 through F. */ /* Allow NuBus slots 9 through F. */
via2[vDirA] &= 0x80 | ~(1 << irq_idx); via2[vDirA] &= 0x80 | ~(1 << irq_idx);
} }
/* fall through */ fallthrough;
case MAC_VIA_IICI: case MAC_VIA_IICI:
via_irq_enable(irq); via_irq_enable(irq);
break; break;

2
arch/m68k/mm/fault.c
View File

@ -118,7 +118,7 @@ int do_page_fault(struct pt_regs *regs, unsigned long address,
pr_debug("do_page_fault: good_area\n"); pr_debug("do_page_fault: good_area\n");
switch (error_code & 3) { switch (error_code & 3) {
default: /* 3: write, present */ default: /* 3: write, present */
/* fall through */ fallthrough;
case 2: /* write, not present */ case 2: /* write, not present */
if (!(vma->vm_flags & VM_WRITE)) if (!(vma->vm_flags & VM_WRITE))
goto acc_err; goto acc_err;

2
arch/microblaze/kernel/signal.c
View File

@ -249,7 +249,7 @@ handle_restart(struct pt_regs *regs, struct k_sigaction *ka, int has_handler)
regs->r3 = -EINTR; regs->r3 = -EINTR;
break; break;
} }
/* fallthrough */ fallthrough;
case -ERESTARTNOINTR: case -ERESTARTNOINTR:
do_restart: do_restart:
/* offset of 4 bytes to re-execute trap (brki) instruction */ /* offset of 4 bytes to re-execute trap (brki) instruction */

64
arch/mips/include/asm/unroll.h
View File

@ -28,38 +28,38 @@
BUILD_BUG_ON(!__builtin_constant_p(times)); \ BUILD_BUG_ON(!__builtin_constant_p(times)); \
\ \
switch (times) { \ switch (times) { \
case 32: fn(__VA_ARGS__); /* fall through */ \ case 32: fn(__VA_ARGS__); fallthrough; \
case 31: fn(__VA_ARGS__); /* fall through */ \ case 31: fn(__VA_ARGS__); fallthrough; \
case 30: fn(__VA_ARGS__); /* fall through */ \ case 30: fn(__VA_ARGS__); fallthrough; \
case 29: fn(__VA_ARGS__); /* fall through */ \ case 29: fn(__VA_ARGS__); fallthrough; \
case 28: fn(__VA_ARGS__); /* fall through */ \ case 28: fn(__VA_ARGS__); fallthrough; \
case 27: fn(__VA_ARGS__); /* fall through */ \ case 27: fn(__VA_ARGS__); fallthrough; \
case 26: fn(__VA_ARGS__); /* fall through */ \ case 26: fn(__VA_ARGS__); fallthrough; \
case 25: fn(__VA_ARGS__); /* fall through */ \ case 25: fn(__VA_ARGS__); fallthrough; \
case 24: fn(__VA_ARGS__); /* fall through */ \ case 24: fn(__VA_ARGS__); fallthrough; \
case 23: fn(__VA_ARGS__); /* fall through */ \ case 23: fn(__VA_ARGS__); fallthrough; \
case 22: fn(__VA_ARGS__); /* fall through */ \ case 22: fn(__VA_ARGS__); fallthrough; \
case 21: fn(__VA_ARGS__); /* fall through */ \ case 21: fn(__VA_ARGS__); fallthrough; \
case 20: fn(__VA_ARGS__); /* fall through */ \ case 20: fn(__VA_ARGS__); fallthrough; \
case 19: fn(__VA_ARGS__); /* fall through */ \ case 19: fn(__VA_ARGS__); fallthrough; \
case 18: fn(__VA_ARGS__); /* fall through */ \ case 18: fn(__VA_ARGS__); fallthrough; \
case 17: fn(__VA_ARGS__); /* fall through */ \ case 17: fn(__VA_ARGS__); fallthrough; \
case 16: fn(__VA_ARGS__); /* fall through */ \ case 16: fn(__VA_ARGS__); fallthrough; \
case 15: fn(__VA_ARGS__); /* fall through */ \ case 15: fn(__VA_ARGS__); fallthrough; \
case 14: fn(__VA_ARGS__); /* fall through */ \ case 14: fn(__VA_ARGS__); fallthrough; \
case 13: fn(__VA_ARGS__); /* fall through */ \ case 13: fn(__VA_ARGS__); fallthrough; \
case 12: fn(__VA_ARGS__); /* fall through */ \ case 12: fn(__VA_ARGS__); fallthrough; \
case 11: fn(__VA_ARGS__); /* fall through */ \ case 11: fn(__VA_ARGS__); fallthrough; \
case 10: fn(__VA_ARGS__); /* fall through */ \ case 10: fn(__VA_ARGS__); fallthrough; \
case 9: fn(__VA_ARGS__); /* fall through */ \ case 9: fn(__VA_ARGS__); fallthrough; \
case 8: fn(__VA_ARGS__); /* fall through */ \ case 8: fn(__VA_ARGS__); fallthrough; \
case 7: fn(__VA_ARGS__); /* fall through */ \ case 7: fn(__VA_ARGS__); fallthrough; \
case 6: fn(__VA_ARGS__); /* fall through */ \ case 6: fn(__VA_ARGS__); fallthrough; \
case 5: fn(__VA_ARGS__); /* fall through */ \ case 5: fn(__VA_ARGS__); fallthrough; \
case 4: fn(__VA_ARGS__); /* fall through */ \ case 4: fn(__VA_ARGS__); fallthrough; \
case 3: fn(__VA_ARGS__); /* fall through */ \ case 3: fn(__VA_ARGS__); fallthrough; \
case 2: fn(__VA_ARGS__); /* fall through */ \ case 2: fn(__VA_ARGS__); fallthrough; \
case 1: fn(__VA_ARGS__); /* fall through */ \ case 1: fn(__VA_ARGS__); fallthrough; \
case 0: break; \ case 0: break; \
\ \
default: \ default: \

12
arch/nds32/kernel/fpu.c
View File

@ -45,7 +45,7 @@ void save_fpu(struct task_struct *tsk)
: /* no output */ : /* no output */
: "r" (&tsk->thread.fpu) : "r" (&tsk->thread.fpu)
: "memory"); : "memory");
/* fall through */ fallthrough;
case SP32_DP16_reg: case SP32_DP16_reg:
asm volatile ("fsdi $fd15, [%0+0x78]\n\t" asm volatile ("fsdi $fd15, [%0+0x78]\n\t"
"fsdi $fd14, [%0+0x70]\n\t" "fsdi $fd14, [%0+0x70]\n\t"
@ -58,7 +58,7 @@ void save_fpu(struct task_struct *tsk)
: /* no output */ : /* no output */
: "r" (&tsk->thread.fpu) : "r" (&tsk->thread.fpu)
: "memory"); : "memory");
/* fall through */ fallthrough;
case SP16_DP8_reg: case SP16_DP8_reg:
asm volatile ("fsdi $fd7, [%0+0x38]\n\t" asm volatile ("fsdi $fd7, [%0+0x38]\n\t"
"fsdi $fd6, [%0+0x30]\n\t" "fsdi $fd6, [%0+0x30]\n\t"
@ -67,7 +67,7 @@ void save_fpu(struct task_struct *tsk)
: /* no output */ : /* no output */
: "r" (&tsk->thread.fpu) : "r" (&tsk->thread.fpu)
: "memory"); : "memory");
/* fall through */ fallthrough;
case SP8_DP4_reg: case SP8_DP4_reg:
asm volatile ("fsdi $fd3, [%1+0x18]\n\t" asm volatile ("fsdi $fd3, [%1+0x18]\n\t"
"fsdi $fd2, [%1+0x10]\n\t" "fsdi $fd2, [%1+0x10]\n\t"
@ -108,7 +108,7 @@ void load_fpu(const struct fpu_struct *fpregs)
"fldi $fd16, [%0+0x80]\n\t" "fldi $fd16, [%0+0x80]\n\t"
: /* no output */ : /* no output */
: "r" (fpregs)); : "r" (fpregs));
/* fall through */ fallthrough;
case SP32_DP16_reg: case SP32_DP16_reg:
asm volatile ("fldi $fd15, [%0+0x78]\n\t" asm volatile ("fldi $fd15, [%0+0x78]\n\t"
"fldi $fd14, [%0+0x70]\n\t" "fldi $fd14, [%0+0x70]\n\t"
@ -120,7 +120,7 @@ void load_fpu(const struct fpu_struct *fpregs)
"fldi $fd8, [%0+0x40]\n\t" "fldi $fd8, [%0+0x40]\n\t"
: /* no output */ : /* no output */
: "r" (fpregs)); : "r" (fpregs));
/* fall through */ fallthrough;
case SP16_DP8_reg: case SP16_DP8_reg:
asm volatile ("fldi $fd7, [%0+0x38]\n\t" asm volatile ("fldi $fd7, [%0+0x38]\n\t"
"fldi $fd6, [%0+0x30]\n\t" "fldi $fd6, [%0+0x30]\n\t"
@ -128,7 +128,7 @@ void load_fpu(const struct fpu_struct *fpregs)
"fldi $fd4, [%0+0x20]\n\t" "fldi $fd4, [%0+0x20]\n\t"
: /* no output */ : /* no output */
: "r" (fpregs)); : "r" (fpregs));
/* fall through */ fallthrough;
case SP8_DP4_reg: case SP8_DP4_reg:
asm volatile ("fldi $fd3, [%1+0x18]\n\t" asm volatile ("fldi $fd3, [%1+0x18]\n\t"
"fldi $fd2, [%1+0x10]\n\t" "fldi $fd2, [%1+0x10]\n\t"

4
arch/nds32/kernel/signal.c
View File

@ -316,7 +316,7 @@ static void handle_signal(struct ksignal *ksig, struct pt_regs *regs)
regs->uregs[0] = -EINTR; regs->uregs[0] = -EINTR;
break; break;
} }
/* Else, fall through */ fallthrough;
case -ERESTARTNOINTR: case -ERESTARTNOINTR:
regs->uregs[0] = regs->orig_r0; regs->uregs[0] = regs->orig_r0;
regs->ipc -= 4; regs->ipc -= 4;
@ -361,7 +361,7 @@ static void do_signal(struct pt_regs *regs)
switch (regs->uregs[0]) { switch (regs->uregs[0]) {
case -ERESTART_RESTARTBLOCK: case -ERESTART_RESTARTBLOCK:
regs->uregs[15] = __NR_restart_syscall; regs->uregs[15] = __NR_restart_syscall;
/* Fall through */ fallthrough;
case -ERESTARTNOHAND: case -ERESTARTNOHAND:
case -ERESTARTSYS: case -ERESTARTSYS:
case -ERESTARTNOINTR: case -ERESTARTNOINTR:

2
arch/openrisc/kernel/signal.c
View File

@ -244,7 +244,7 @@ int do_signal(struct pt_regs *regs, int syscall)
switch (retval) { switch (retval) {
case -ERESTART_RESTARTBLOCK: case -ERESTART_RESTARTBLOCK:
restart = -2; restart = -2;
/* Fall through */ fallthrough;
case -ERESTARTNOHAND: case -ERESTARTNOHAND:
case -ERESTARTSYS: case -ERESTARTSYS:
case -ERESTARTNOINTR: case -ERESTARTNOINTR:

2
arch/parisc/kernel/signal.c
View File

@ -502,7 +502,7 @@ syscall_restart(struct pt_regs *regs, struct k_sigaction *ka)
regs->gr[28] = -EINTR; regs->gr[28] = -EINTR;
break; break;
} }
/* fallthrough */ fallthrough;
case -ERESTARTNOINTR: case -ERESTARTNOINTR:
check_syscallno_in_delay_branch(regs); check_syscallno_in_delay_branch(regs);
break; break;

11
arch/parisc/kernel/traps.c
View File

@ -437,7 +437,6 @@ void parisc_terminate(char *msg, struct pt_regs *regs, int code, unsigned long o
break; break;
default: default:
/* Fall through */
break; break;
} }
@ -644,12 +643,12 @@ void notrace handle_interruption(int code, struct pt_regs *regs)
case 15: case 15:
/* Data TLB miss fault/Data page fault */ /* Data TLB miss fault/Data page fault */
/* Fall through */ fallthrough;
case 16: case 16:
/* Non-access instruction TLB miss fault */ /* Non-access instruction TLB miss fault */
/* The instruction TLB entry needed for the target address of the FIC /* The instruction TLB entry needed for the target address of the FIC
is absent, and hardware can't find it, so we get to cleanup */ is absent, and hardware can't find it, so we get to cleanup */
/* Fall through */ fallthrough;
case 17: case 17:
/* Non-access data TLB miss fault/Non-access data page fault */ /* Non-access data TLB miss fault/Non-access data page fault */
/* FIXME: /* FIXME:
@ -673,7 +672,7 @@ void notrace handle_interruption(int code, struct pt_regs *regs)
handle_unaligned(regs); handle_unaligned(regs);
return; return;
} }
/* Fall Through */ fallthrough;
case 26: case 26:
/* PCXL: Data memory access rights trap */ /* PCXL: Data memory access rights trap */
fault_address = regs->ior; fault_address = regs->ior;
@ -683,7 +682,7 @@ void notrace handle_interruption(int code, struct pt_regs *regs)
case 19: case 19:
/* Data memory break trap */ /* Data memory break trap */
regs->gr[0] |= PSW_X; /* So we can single-step over the trap */ regs->gr[0] |= PSW_X; /* So we can single-step over the trap */
/* fall thru */ fallthrough;
case 21: case 21:
/* Page reference trap */ /* Page reference trap */
handle_gdb_break(regs, TRAP_HWBKPT); handle_gdb_break(regs, TRAP_HWBKPT);
@ -730,7 +729,7 @@ void notrace handle_interruption(int code, struct pt_regs *regs)
} }
mmap_read_unlock(current->mm); mmap_read_unlock(current->mm);
} }
/* Fall Through */ fallthrough;
case 27: case 27:
/* Data memory protection ID trap */ /* Data memory protection ID trap */
if (code == 27 && !user_mode(regs) && if (code == 27 && !user_mode(regs) &&

4
arch/parisc/mm/fault.c
View File

@ -67,7 +67,7 @@ parisc_acctyp(unsigned long code, unsigned int inst)
case 0x30000000: /* coproc2 */ case 0x30000000: /* coproc2 */
if (bit22set(inst)) if (bit22set(inst))
return VM_WRITE; return VM_WRITE;
/* fall through */ fallthrough;
case 0x0: /* indexed/memory management */ case 0x0: /* indexed/memory management */
if (bit22set(inst)) { if (bit22set(inst)) {
@ -370,7 +370,7 @@ void do_page_fault(struct pt_regs *regs, unsigned long code,
} }
/* probably address is outside of mapped file */ /* probably address is outside of mapped file */
/* fall through */ fallthrough;
case 17: /* NA data TLB miss / page fault */ case 17: /* NA data TLB miss / page fault */
case 18: /* Unaligned access - PCXS only */ case 18: /* Unaligned access - PCXS only */
signo = SIGBUS; signo = SIGBUS;

2
arch/powerpc/net/bpf_jit_comp.c
View File

@ -475,7 +475,7 @@ static int bpf_jit_build_body(struct bpf_prog *fp, u32 *image,
case BPF_JMP | BPF_JSET | BPF_K: case BPF_JMP | BPF_JSET | BPF_K:
case BPF_JMP | BPF_JSET | BPF_X: case BPF_JMP | BPF_JSET | BPF_X:
true_cond = COND_NE; true_cond = COND_NE;
/* Fall through */ fallthrough;
cond_branch: cond_branch:
/* same targets, can avoid doing the test :) */ /* same targets, can avoid doing the test :) */
if (filter[i].jt == filter[i].jf) { if (filter[i].jt == filter[i].jf) {

2
arch/riscv/kernel/signal.c
View File

@ -250,7 +250,7 @@ static void handle_signal(struct ksignal *ksig, struct pt_regs *regs)
regs->a0 = -EINTR; regs->a0 = -EINTR;
break; break;
} }
/* fallthrough */ fallthrough;
case -ERESTARTNOINTR: case -ERESTARTNOINTR:
regs->a0 = regs->orig_a0; regs->a0 = regs->orig_a0;
regs->epc -= 0x4; regs->epc -= 0x4;

4
arch/riscv/net/bpf_jit_comp32.c
View File

@ -1020,7 +1020,7 @@ int bpf_jit_emit_insn(const struct bpf_insn *insn, struct rv_jit_context *ctx,
emit_zext64(dst, ctx); emit_zext64(dst, ctx);
break; break;
} }
/* Fallthrough. */ fallthrough;
case BPF_ALU | BPF_ADD | BPF_X: case BPF_ALU | BPF_ADD | BPF_X:
case BPF_ALU | BPF_SUB | BPF_X: case BPF_ALU | BPF_SUB | BPF_X:
@ -1079,7 +1079,7 @@ int bpf_jit_emit_insn(const struct bpf_insn *insn, struct rv_jit_context *ctx,
case 16: case 16:
emit(rv_slli(lo(rd), lo(rd), 16), ctx); emit(rv_slli(lo(rd), lo(rd), 16), ctx);
emit(rv_srli(lo(rd), lo(rd), 16), ctx); emit(rv_srli(lo(rd), lo(rd), 16), ctx);
/* Fallthrough. */ fallthrough;
case 32: case 32:
if (!ctx->prog->aux->verifier_zext) if (!ctx->prog->aux->verifier_zext)
emit(rv_addi(hi(rd), RV_REG_ZERO, 0), ctx); emit(rv_addi(hi(rd), RV_REG_ZERO, 0), ctx);

2
arch/sh/drivers/platform_early.c
View File

@ -246,7 +246,7 @@ static int __init sh_early_platform_driver_probe_id(char *class_str,
case EARLY_PLATFORM_ID_ERROR: case EARLY_PLATFORM_ID_ERROR:
pr_warn("%s: unable to parse %s parameter\n", pr_warn("%s: unable to parse %s parameter\n",
class_str, epdrv->pdrv->driver.name); class_str, epdrv->pdrv->driver.name);
/* fall-through */ fallthrough;
case EARLY_PLATFORM_ID_UNSET: case EARLY_PLATFORM_ID_UNSET:
match = NULL; match = NULL;
break; break;

4
arch/sh/kernel/disassemble.c
View File

@ -486,7 +486,7 @@ static void print_sh_insn(u32 memaddr, u16 insn)
pr_cont("xd%d", rn & ~1); pr_cont("xd%d", rn & ~1);
break; break;
} }
/* else, fall through */ fallthrough;
case D_REG_N: case D_REG_N:
pr_cont("dr%d", rn); pr_cont("dr%d", rn);
break; break;
@ -495,7 +495,7 @@ static void print_sh_insn(u32 memaddr, u16 insn)
pr_cont("xd%d", rm & ~1); pr_cont("xd%d", rm & ~1);
break; break;
} }
/* else, fall through */ fallthrough;
case D_REG_M: case D_REG_M:
pr_cont("dr%d", rm); pr_cont("dr%d", rm);
break; break;

2
arch/sh/kernel/kgdb.c
View File

@ -266,7 +266,7 @@ int kgdb_arch_handle_exception(int e_vector, int signo, int err_code,
ptr = &remcomInBuffer[1]; ptr = &remcomInBuffer[1];
if (kgdb_hex2long(&ptr, &addr)) if (kgdb_hex2long(&ptr, &addr))
linux_regs->pc = addr; linux_regs->pc = addr;
/* fallthrough */ fallthrough;
case 'D': case 'D':
case 'k': case 'k':
atomic_set(&kgdb_cpu_doing_single_step, -1); atomic_set(&kgdb_cpu_doing_single_step, -1);

2
arch/sh/kernel/signal_32.c
View File

@ -418,7 +418,7 @@ handle_syscall_restart(unsigned long save_r0, struct pt_regs *regs,
case -ERESTARTSYS: case -ERESTARTSYS:
if (!(sa->sa_flags & SA_RESTART)) if (!(sa->sa_flags & SA_RESTART))
goto no_system_call_restart; goto no_system_call_restart;
/* fallthrough */ fallthrough;
case -ERESTARTNOINTR: case -ERESTARTNOINTR:
regs->regs[0] = save_r0; regs->regs[0] = save_r0;
regs->pc -= instruction_size(__raw_readw(regs->pc - 4)); regs->pc -= instruction_size(__raw_readw(regs->pc - 4));

1
arch/sparc/kernel/auxio_64.c
View File

@ -87,7 +87,6 @@ void auxio_set_lte(int on)
__auxio_sbus_set_lte(on); __auxio_sbus_set_lte(on);
break; break;
case AUXIO_TYPE_EBUS: case AUXIO_TYPE_EBUS:
/* FALL-THROUGH */
default: default:
break; break;
} }

2
arch/sparc/kernel/central.c
View File

@ -55,7 +55,7 @@ static int clock_board_calc_nslots(struct clock_board *p)
else else
return 5; return 5;
} }
/* Fallthrough */ fallthrough;
default: default:
return 4; return 4;
} }

2
arch/sparc/kernel/kgdb_32.c
View File

@ -122,7 +122,7 @@ int kgdb_arch_handle_exception(int e_vector, int signo, int err_code,
linux_regs->pc = addr; linux_regs->pc = addr;
linux_regs->npc = addr + 4; linux_regs->npc = addr + 4;
} }
/* fall through */ fallthrough;
case 'D': case 'D':
case 'k': case 'k':

2
arch/sparc/kernel/kgdb_64.c
View File

@ -148,7 +148,7 @@ int kgdb_arch_handle_exception(int e_vector, int signo, int err_code,
linux_regs->tpc = addr; linux_regs->tpc = addr;
linux_regs->tnpc = addr + 4; linux_regs->tnpc = addr + 4;
} }
/* fall through */ fallthrough;
case 'D': case 'D':
case 'k': case 'k':

2
arch/sparc/kernel/pcr.c
View File

@ -359,7 +359,7 @@ int __init pcr_arch_init(void)
* counter overflow interrupt so we can't make use of * counter overflow interrupt so we can't make use of
* their hardware currently. * their hardware currently.
*/ */
/* fallthrough */ fallthrough;
default: default:
err = -ENODEV; err = -ENODEV;
goto out_unregister; goto out_unregister;

2
arch/sparc/kernel/prom_32.c
View File

@ -224,7 +224,7 @@ void __init of_console_init(void)
case PROMDEV_TTYB: case PROMDEV_TTYB:
skip = 1; skip = 1;
/* FALLTHRU */ fallthrough;
case PROMDEV_TTYA: case PROMDEV_TTYA:
type = "serial"; type = "serial";

4
arch/sparc/kernel/signal32.c
View File

@ -646,7 +646,7 @@ static inline void syscall_restart32(unsigned long orig_i0, struct pt_regs *regs
case ERESTARTSYS: case ERESTARTSYS:
if (!(sa->sa_flags & SA_RESTART)) if (!(sa->sa_flags & SA_RESTART))
goto no_system_call_restart; goto no_system_call_restart;
/* fallthrough */ fallthrough;
case ERESTARTNOINTR: case ERESTARTNOINTR:
regs->u_regs[UREG_I0] = orig_i0; regs->u_regs[UREG_I0] = orig_i0;
regs->tpc -= 4; regs->tpc -= 4;
@ -686,7 +686,7 @@ void do_signal32(struct pt_regs * regs)
regs->tpc -= 4; regs->tpc -= 4;
regs->tnpc -= 4; regs->tnpc -= 4;
pt_regs_clear_syscall(regs); pt_regs_clear_syscall(regs);
/* fall through */ fallthrough;
case ERESTART_RESTARTBLOCK: case ERESTART_RESTARTBLOCK:
regs->u_regs[UREG_G1] = __NR_restart_syscall; regs->u_regs[UREG_G1] = __NR_restart_syscall;
regs->tpc -= 4; regs->tpc -= 4;

4
arch/sparc/kernel/signal_32.c
View File

@ -440,7 +440,7 @@ static inline void syscall_restart(unsigned long orig_i0, struct pt_regs *regs,
case ERESTARTSYS: case ERESTARTSYS:
if (!(sa->sa_flags & SA_RESTART)) if (!(sa->sa_flags & SA_RESTART))
goto no_system_call_restart; goto no_system_call_restart;
/* fallthrough */ fallthrough;
case ERESTARTNOINTR: case ERESTARTNOINTR:
regs->u_regs[UREG_I0] = orig_i0; regs->u_regs[UREG_I0] = orig_i0;
regs->pc -= 4; regs->pc -= 4;
@ -506,7 +506,7 @@ static void do_signal(struct pt_regs *regs, unsigned long orig_i0)
regs->pc -= 4; regs->pc -= 4;
regs->npc -= 4; regs->npc -= 4;
pt_regs_clear_syscall(regs); pt_regs_clear_syscall(regs);
/* fall through */ fallthrough;
case ERESTART_RESTARTBLOCK: case ERESTART_RESTARTBLOCK:
regs->u_regs[UREG_G1] = __NR_restart_syscall; regs->u_regs[UREG_G1] = __NR_restart_syscall;
regs->pc -= 4; regs->pc -= 4;

4
arch/sparc/kernel/signal_64.c
View File

@ -461,7 +461,7 @@ static inline void syscall_restart(unsigned long orig_i0, struct pt_regs *regs,
case ERESTARTSYS: case ERESTARTSYS:
if (!(sa->sa_flags & SA_RESTART)) if (!(sa->sa_flags & SA_RESTART))
goto no_system_call_restart; goto no_system_call_restart;
/* fallthrough */ fallthrough;
case ERESTARTNOINTR: case ERESTARTNOINTR:
regs->u_regs[UREG_I0] = orig_i0; regs->u_regs[UREG_I0] = orig_i0;
regs->tpc -= 4; regs->tpc -= 4;
@ -532,7 +532,7 @@ static void do_signal(struct pt_regs *regs, unsigned long orig_i0)
regs->tpc -= 4; regs->tpc -= 4;
regs->tnpc -= 4; regs->tnpc -= 4;
pt_regs_clear_syscall(regs); pt_regs_clear_syscall(regs);
/* fall through */ fallthrough;
case ERESTART_RESTARTBLOCK: case ERESTART_RESTARTBLOCK:
regs->u_regs[UREG_G1] = __NR_restart_syscall; regs->u_regs[UREG_G1] = __NR_restart_syscall;
regs->tpc -= 4; regs->tpc -= 4;

8
arch/sparc/math-emu/math_32.c
View File

@ -359,7 +359,7 @@ static int do_one_mathemu(u32 insn, unsigned long *pfsr, unsigned long *fregs)
*pfsr |= (6 << 14); *pfsr |= (6 << 14);
return 0; /* simulate invalid_fp_register exception */ return 0; /* simulate invalid_fp_register exception */
} }
/* fall through */ fallthrough;
case 2: case 2:
if (freg & 1) { /* doublewords must have bit 5 zeroed */ if (freg & 1) { /* doublewords must have bit 5 zeroed */
*pfsr |= (6 << 14); *pfsr |= (6 << 14);
@ -380,7 +380,7 @@ static int do_one_mathemu(u32 insn, unsigned long *pfsr, unsigned long *fregs)
*pfsr |= (6 << 14); *pfsr |= (6 << 14);
return 0; /* simulate invalid_fp_register exception */ return 0; /* simulate invalid_fp_register exception */
} }
/* fall through */ fallthrough;
case 2: case 2:
if (freg & 1) { /* doublewords must have bit 5 zeroed */ if (freg & 1) { /* doublewords must have bit 5 zeroed */
*pfsr |= (6 << 14); *pfsr |= (6 << 14);
@ -408,13 +408,13 @@ static int do_one_mathemu(u32 insn, unsigned long *pfsr, unsigned long *fregs)
*pfsr |= (6 << 14); *pfsr |= (6 << 14);
return 0; /* simulate invalid_fp_register exception */ return 0; /* simulate invalid_fp_register exception */
} }
/* fall through */ fallthrough;
case 2: case 2:
if (freg & 1) { /* doublewords must have bit 5 zeroed */ if (freg & 1) { /* doublewords must have bit 5 zeroed */
*pfsr |= (6 << 14); *pfsr |= (6 << 14);
return 0; return 0;
} }
/* fall through */ fallthrough;
case 1: case 1:
rd = (void *)&fregs[freg]; rd = (void *)&fregs[freg];
break; break;

2
arch/sparc/net/bpf_jit_comp_32.c
View File

@ -491,7 +491,7 @@ void bpf_jit_compile(struct bpf_prog *fp)
} else { } else {
emit_loadimm(K, r_A); emit_loadimm(K, r_A);
} }
/* Fallthrough */ fallthrough;
case BPF_RET | BPF_A: case BPF_RET | BPF_A:
if (seen_or_pass0) { if (seen_or_pass0) {
if (i != flen - 1) { if (i != flen - 1) {

2
arch/um/kernel/signal.c
View File

@ -70,7 +70,7 @@ static void handle_signal(struct ksignal *ksig, struct pt_regs *regs)
PT_REGS_SYSCALL_RET(regs) = -EINTR; PT_REGS_SYSCALL_RET(regs) = -EINTR;
break; break;
} }
/* fallthrough */ fallthrough;
case -ERESTARTNOINTR: case -ERESTARTNOINTR:
PT_REGS_RESTART_SYSCALL(regs); PT_REGS_RESTART_SYSCALL(regs);
PT_REGS_ORIG_SYSCALL(regs) = PT_REGS_SYSCALL_NR(regs); PT_REGS_ORIG_SYSCALL(regs) = PT_REGS_SYSCALL_NR(regs);

4
arch/x86/boot/cmdline.c
View File

@ -54,7 +54,7 @@ int __cmdline_find_option(unsigned long cmdline_ptr, const char *option, char *b
/* else */ /* else */
state = st_wordcmp; state = st_wordcmp;
opptr = option; opptr = option;
/* fall through */ fallthrough;
case st_wordcmp: case st_wordcmp:
if (c == '=' && !*opptr) { if (c == '=' && !*opptr) {
@ -129,7 +129,7 @@ int __cmdline_find_option_bool(unsigned long cmdline_ptr, const char *option)
state = st_wordcmp; state = st_wordcmp;
opptr = option; opptr = option;
wstart = pos; wstart = pos;
/* fall through */ fallthrough;
case st_wordcmp: case st_wordcmp:
if (!*opptr) if (!*opptr)

2
arch/x86/boot/compressed/kaslr.c
View File

@ -178,7 +178,7 @@ parse_memmap(char *p, unsigned long long *start, unsigned long long *size,
} }
*size = 0; *size = 0;
} }
/* Fall through */ fallthrough;
default: default:
/* /*
* If w/o offset, only size specified, memmap=nn[KMG] has the * If w/o offset, only size specified, memmap=nn[KMG] has the

6
arch/x86/events/intel/core.c
View File

@ -4682,7 +4682,7 @@ __init int intel_pmu_init(void)
case INTEL_FAM6_CORE2_MEROM: case INTEL_FAM6_CORE2_MEROM:
x86_add_quirk(intel_clovertown_quirk); x86_add_quirk(intel_clovertown_quirk);
/* fall through */ fallthrough;
case INTEL_FAM6_CORE2_MEROM_L: case INTEL_FAM6_CORE2_MEROM_L:
case INTEL_FAM6_CORE2_PENRYN: case INTEL_FAM6_CORE2_PENRYN:
@ -5062,7 +5062,7 @@ __init int intel_pmu_init(void)
case INTEL_FAM6_SKYLAKE_X: case INTEL_FAM6_SKYLAKE_X:
pmem = true; pmem = true;
/* fall through */ fallthrough;
case INTEL_FAM6_SKYLAKE_L: case INTEL_FAM6_SKYLAKE_L:
case INTEL_FAM6_SKYLAKE: case INTEL_FAM6_SKYLAKE:
case INTEL_FAM6_KABYLAKE_L: case INTEL_FAM6_KABYLAKE_L:
@ -5114,7 +5114,7 @@ __init int intel_pmu_init(void)
case INTEL_FAM6_ICELAKE_X: case INTEL_FAM6_ICELAKE_X:
case INTEL_FAM6_ICELAKE_D: case INTEL_FAM6_ICELAKE_D:
pmem = true; pmem = true;
/* fall through */ fallthrough;
case INTEL_FAM6_ICELAKE_L: case INTEL_FAM6_ICELAKE_L:
case INTEL_FAM6_ICELAKE: case INTEL_FAM6_ICELAKE:
case INTEL_FAM6_TIGERLAKE_L: case INTEL_FAM6_TIGERLAKE_L:

2
arch/x86/events/intel/lbr.c
View File

@ -1268,7 +1268,7 @@ static int branch_type(unsigned long from, unsigned long to, int abort)
ret = X86_BR_ZERO_CALL; ret = X86_BR_ZERO_CALL;
break; break;
} }
/* fall through */ fallthrough;
case 0x9a: /* call far absolute */ case 0x9a: /* call far absolute */
ret = X86_BR_CALL; ret = X86_BR_CALL;
break; break;

2
arch/x86/kernel/alternative.c
View File

@ -239,7 +239,7 @@ void __init arch_init_ideal_nops(void)
return; return;
} }
/* fall through */ fallthrough;
default: default:
#ifdef CONFIG_X86_64 #ifdef CONFIG_X86_64

4
arch/x86/kernel/apic/io_apic.c
View File

@ -800,7 +800,7 @@ static int irq_polarity(int idx)
return IOAPIC_POL_HIGH; return IOAPIC_POL_HIGH;
case MP_IRQPOL_RESERVED: case MP_IRQPOL_RESERVED:
pr_warn("IOAPIC: Invalid polarity: 2, defaulting to low\n"); pr_warn("IOAPIC: Invalid polarity: 2, defaulting to low\n");
/* fall through */ fallthrough;
case MP_IRQPOL_ACTIVE_LOW: case MP_IRQPOL_ACTIVE_LOW:
default: /* Pointless default required due to do gcc stupidity */ default: /* Pointless default required due to do gcc stupidity */
return IOAPIC_POL_LOW; return IOAPIC_POL_LOW;
@ -848,7 +848,7 @@ static int irq_trigger(int idx)
return IOAPIC_EDGE; return IOAPIC_EDGE;
case MP_IRQTRIG_RESERVED: case MP_IRQTRIG_RESERVED:
pr_warn("IOAPIC: Invalid trigger mode 2 defaulting to level\n"); pr_warn("IOAPIC: Invalid trigger mode 2 defaulting to level\n");
/* fall through */ fallthrough;
case MP_IRQTRIG_LEVEL: case MP_IRQTRIG_LEVEL:
default: /* Pointless default required due to do gcc stupidity */ default: /* Pointless default required due to do gcc stupidity */
return IOAPIC_LEVEL; return IOAPIC_LEVEL;

2
arch/x86/kernel/apic/probe_32.c
View File

@ -149,7 +149,7 @@ void __init default_setup_apic_routing(void)
break; break;
} }
/* P4 and above */ /* P4 and above */
/* fall through */ fallthrough;
case X86_VENDOR_HYGON: case X86_VENDOR_HYGON:
case X86_VENDOR_AMD: case X86_VENDOR_AMD:
def_to_bigsmp = 1; def_to_bigsmp = 1;

2
arch/x86/kernel/cpu/cacheinfo.c
View File

@ -248,7 +248,7 @@ amd_cpuid4(int leaf, union _cpuid4_leaf_eax *eax,
switch (leaf) { switch (leaf) {
case 1: case 1:
l1 = &l1i; l1 = &l1i;
/* fall through */ fallthrough;
case 0: case 0:
if (!l1->val) if (!l1->val)
return; return;

2
arch/x86/kernel/cpu/mce/inject.c
View File

@ -199,7 +199,7 @@ static int raise_local(void)
* calling irq_enter, but the necessary * calling irq_enter, but the necessary
* machinery isn't exported currently. * machinery isn't exported currently.
*/ */
/*FALL THROUGH*/ fallthrough;
case MCJ_CTX_PROCESS: case MCJ_CTX_PROCESS:
raise_exception(m, NULL); raise_exception(m, NULL);
break; break;

2
arch/x86/kernel/cpu/mce/intel.c
View File

@ -193,7 +193,7 @@ unsigned long cmci_intel_adjust_timer(unsigned long interval)
if (!atomic_sub_return(1, &cmci_storm_on_cpus)) if (!atomic_sub_return(1, &cmci_storm_on_cpus))
pr_notice("CMCI storm subsided: switching to interrupt mode\n"); pr_notice("CMCI storm subsided: switching to interrupt mode\n");
/* FALLTHROUGH */ fallthrough;
case CMCI_STORM_SUBSIDED: case CMCI_STORM_SUBSIDED:
/* /*

2
arch/x86/kernel/cpu/mtrr/cyrix.c
View File

@ -98,7 +98,7 @@ cyrix_get_free_region(unsigned long base, unsigned long size, int replace_reg)
case 7: case 7:
if (size < 0x40) if (size < 0x40)
break; break;
/* Else, fall through */ fallthrough;
case 6: case 6:
case 5: case 5:
case 4: case 4:

2
arch/x86/kernel/hw_breakpoint.c
View File

@ -349,7 +349,7 @@ static int arch_build_bp_info(struct perf_event *bp,
hw->len = X86_BREAKPOINT_LEN_X; hw->len = X86_BREAKPOINT_LEN_X;
return 0; return 0;
} }
/* fall through */ fallthrough;
default: default:
return -EINVAL; return -EINVAL;
} }

4
arch/x86/kernel/kgdb.c
View File

@ -450,7 +450,7 @@ int kgdb_arch_handle_exception(int e_vector, int signo, int err_code,
ptr = &remcomInBuffer[1]; ptr = &remcomInBuffer[1];
if (kgdb_hex2long(&ptr, &addr)) if (kgdb_hex2long(&ptr, &addr))
linux_regs->ip = addr; linux_regs->ip = addr;
/* fall through */ fallthrough;
case 'D': case 'D':
case 'k': case 'k':
/* clear the trace bit */ /* clear the trace bit */
@ -539,7 +539,7 @@ static int __kgdb_notify(struct die_args *args, unsigned long cmd)
* a system call which should be ignored * a system call which should be ignored
*/ */
return NOTIFY_DONE; return NOTIFY_DONE;
/* fall through */ fallthrough;
default: default:
if (user_mode(regs)) if (user_mode(regs))
return NOTIFY_DONE; return NOTIFY_DONE;

4
arch/x86/kernel/mpparse.c
View File

@ -312,7 +312,7 @@ static void __init construct_default_ioirq_mptable(int mpc_default_type)
case 2: case 2:
if (i == 0 || i == 13) if (i == 0 || i == 13)
continue; /* IRQ0 & IRQ13 not connected */ continue; /* IRQ0 & IRQ13 not connected */
/* fall through */ fallthrough;
default: default:
if (i == 2) if (i == 2)
continue; /* IRQ2 is never connected */ continue; /* IRQ2 is never connected */
@ -356,7 +356,7 @@ static void __init construct_ioapic_table(int mpc_default_type)
default: default:
pr_err("???\nUnknown standard configuration %d\n", pr_err("???\nUnknown standard configuration %d\n",
mpc_default_type); mpc_default_type);
/* fall through */ fallthrough;
case 1: case 1:
case 5: case 5:
memcpy(bus.bustype, "ISA ", 6); memcpy(bus.bustype, "ISA ", 6);

2
arch/x86/kernel/ptrace.c
View File

@ -204,7 +204,7 @@ static int set_segment_reg(struct task_struct *task,
case offsetof(struct user_regs_struct, ss): case offsetof(struct user_regs_struct, ss):
if (unlikely(value == 0)) if (unlikely(value == 0))
return -EIO; return -EIO;
/* Else, fall through */ fallthrough;
default: default:
*pt_regs_access(task_pt_regs(task), offset) = value; *pt_regs_access(task_pt_regs(task), offset) = value;

2
arch/x86/kernel/reboot.c
View File

@ -654,7 +654,7 @@ static void native_machine_emergency_restart(void)
case BOOT_CF9_FORCE: case BOOT_CF9_FORCE:
port_cf9_safe = true; port_cf9_safe = true;
/* Fall through */ fallthrough;
case BOOT_CF9_SAFE: case BOOT_CF9_SAFE:
if (port_cf9_safe) { if (port_cf9_safe) {

2
arch/x86/kernel/signal.c
View File

@ -726,7 +726,7 @@ handle_signal(struct ksignal *ksig, struct pt_regs *regs)
regs->ax = -EINTR; regs->ax = -EINTR;
break; break;
} }
/* fallthrough */ fallthrough;
case -ERESTARTNOINTR: case -ERESTARTNOINTR:
regs->ax = regs->orig_ax; regs->ax = regs->orig_ax;
regs->ip -= 2; regs->ip -= 2;

4
arch/x86/kernel/uprobes.c
View File

@ -735,7 +735,7 @@ static int branch_setup_xol_ops(struct arch_uprobe *auprobe, struct insn *insn)
* OPCODE1() of the "short" jmp which checks the same condition. * OPCODE1() of the "short" jmp which checks the same condition.
*/ */
opc1 = OPCODE2(insn) - 0x10; opc1 = OPCODE2(insn) - 0x10;
/* fall through */ fallthrough;
default: default:
if (!is_cond_jmp_opcode(opc1)) if (!is_cond_jmp_opcode(opc1))
return -ENOSYS; return -ENOSYS;
@ -892,7 +892,7 @@ int arch_uprobe_analyze_insn(struct arch_uprobe *auprobe, struct mm_struct *mm,
fix_ip_or_call = 0; fix_ip_or_call = 0;
break; break;
} }
/* fall through */ fallthrough;
default: default:
riprel_analyze(auprobe, &insn); riprel_analyze(auprobe, &insn);
} }

2
arch/x86/kvm/emulate.c
View File

@ -3016,7 +3016,7 @@ static void string_registers_quirk(struct x86_emulate_ctxt *ctxt)
case 0xa4: /* movsb */ case 0xa4: /* movsb */
case 0xa5: /* movsd/w */ case 0xa5: /* movsd/w */
*reg_rmw(ctxt, VCPU_REGS_RSI) &= (u32)-1; *reg_rmw(ctxt, VCPU_REGS_RSI) &= (u32)-1;
/* fall through */ fallthrough;
case 0xaa: /* stosb */ case 0xaa: /* stosb */
case 0xab: /* stosd/w */ case 0xab: /* stosd/w */
*reg_rmw(ctxt, VCPU_REGS_RDI) &= (u32)-1; *reg_rmw(ctxt, VCPU_REGS_RDI) &= (u32)-1;

2
arch/x86/kvm/hyperv.c
View File

@ -1779,7 +1779,7 @@ int kvm_hv_hypercall(struct kvm_vcpu *vcpu)
ret = kvm_hvcall_signal_event(vcpu, fast, ingpa); ret = kvm_hvcall_signal_event(vcpu, fast, ingpa);
if (ret != HV_STATUS_INVALID_PORT_ID) if (ret != HV_STATUS_INVALID_PORT_ID)
break; break;
/* fall through - maybe userspace knows this conn_id. */ fallthrough; /* maybe userspace knows this conn_id */
case HVCALL_POST_MESSAGE: case HVCALL_POST_MESSAGE:
/* don't bother userspace if it has no way to handle it */ /* don't bother userspace if it has no way to handle it */
if (unlikely(rep || !vcpu_to_synic(vcpu)->active)) { if (unlikely(rep || !vcpu_to_synic(vcpu)->active)) {

2
arch/x86/kvm/irq_comm.c
View File

@ -285,7 +285,7 @@ int kvm_set_routing_entry(struct kvm *kvm,
switch (ue->u.irqchip.irqchip) { switch (ue->u.irqchip.irqchip) {
case KVM_IRQCHIP_PIC_SLAVE: case KVM_IRQCHIP_PIC_SLAVE:
e->irqchip.pin += PIC_NUM_PINS / 2; e->irqchip.pin += PIC_NUM_PINS / 2;
/* fall through */ fallthrough;
case KVM_IRQCHIP_PIC_MASTER: case KVM_IRQCHIP_PIC_MASTER:
if (ue->u.irqchip.pin >= PIC_NUM_PINS / 2) if (ue->u.irqchip.pin >= PIC_NUM_PINS / 2)
return -EINVAL; return -EINVAL;

6
arch/x86/kvm/lapic.c
View File

@ -1053,7 +1053,7 @@ static int __apic_accept_irq(struct kvm_lapic *apic, int delivery_mode,
switch (delivery_mode) { switch (delivery_mode) {
case APIC_DM_LOWEST: case APIC_DM_LOWEST:
vcpu->arch.apic_arb_prio++; vcpu->arch.apic_arb_prio++;
/* fall through */ fallthrough;
case APIC_DM_FIXED: case APIC_DM_FIXED:
if (unlikely(trig_mode && !level)) if (unlikely(trig_mode && !level))
break; break;
@ -1341,7 +1341,7 @@ static u32 __apic_read(struct kvm_lapic *apic, unsigned int offset)
break; break;
case APIC_TASKPRI: case APIC_TASKPRI:
report_tpr_access(apic, false); report_tpr_access(apic, false);
/* fall thru */ fallthrough;
default: default:
val = kvm_lapic_get_reg(apic, offset); val = kvm_lapic_get_reg(apic, offset);
break; break;
@ -2027,7 +2027,7 @@ int kvm_lapic_reg_write(struct kvm_lapic *apic, u32 reg, u32 val)
case APIC_LVT0: case APIC_LVT0:
apic_manage_nmi_watchdog(apic, val); apic_manage_nmi_watchdog(apic, val);
/* fall through */ fallthrough;
case APIC_LVTTHMR: case APIC_LVTTHMR:
case APIC_LVTPC: case APIC_LVTPC:
case APIC_LVT1: case APIC_LVT1:

2
arch/x86/kvm/mmu/mmu.c
View File

@ -4422,7 +4422,7 @@ __reset_rsvds_bits_mask(struct kvm_vcpu *vcpu,
rsvd_bits(maxphyaddr, 51); rsvd_bits(maxphyaddr, 51);
rsvd_check->rsvd_bits_mask[1][4] = rsvd_check->rsvd_bits_mask[1][4] =
rsvd_check->rsvd_bits_mask[0][4]; rsvd_check->rsvd_bits_mask[0][4];
/* fall through */ fallthrough;
case PT64_ROOT_4LEVEL: case PT64_ROOT_4LEVEL:
rsvd_check->rsvd_bits_mask[0][3] = exb_bit_rsvd | rsvd_check->rsvd_bits_mask[0][3] = exb_bit_rsvd |
nonleaf_bit8_rsvd | rsvd_bits(7, 7) | nonleaf_bit8_rsvd | rsvd_bits(7, 7) |

2
arch/x86/kvm/svm/svm.c
View File

@ -2668,7 +2668,7 @@ static int svm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
case MSR_IA32_APICBASE: case MSR_IA32_APICBASE:
if (kvm_vcpu_apicv_active(vcpu)) if (kvm_vcpu_apicv_active(vcpu))
avic_update_vapic_bar(to_svm(vcpu), data); avic_update_vapic_bar(to_svm(vcpu), data);
/* Fall through */ fallthrough;
default: default:
return kvm_set_msr_common(vcpu, msr); return kvm_set_msr_common(vcpu, msr);
} }

12
arch/x86/kvm/vmx/vmx.c
View File

@ -4654,7 +4654,7 @@ static bool rmode_exception(struct kvm_vcpu *vcpu, int vec)
vmcs_read32(VM_EXIT_INSTRUCTION_LEN); vmcs_read32(VM_EXIT_INSTRUCTION_LEN);
if (vcpu->guest_debug & KVM_GUESTDBG_USE_SW_BP) if (vcpu->guest_debug & KVM_GUESTDBG_USE_SW_BP)
return false; return false;
/* fall through */ fallthrough;
case DB_VECTOR: case DB_VECTOR:
return !(vcpu->guest_debug & return !(vcpu->guest_debug &
(KVM_GUESTDBG_SINGLESTEP | KVM_GUESTDBG_USE_HW_BP)); (KVM_GUESTDBG_SINGLESTEP | KVM_GUESTDBG_USE_HW_BP));
@ -4827,7 +4827,7 @@ static int handle_exception_nmi(struct kvm_vcpu *vcpu)
} }
kvm_run->debug.arch.dr6 = dr6 | DR6_FIXED_1 | DR6_RTM; kvm_run->debug.arch.dr6 = dr6 | DR6_FIXED_1 | DR6_RTM;
kvm_run->debug.arch.dr7 = vmcs_readl(GUEST_DR7); kvm_run->debug.arch.dr7 = vmcs_readl(GUEST_DR7);
/* fall through */ fallthrough;
case BP_VECTOR: case BP_VECTOR:
/* /*
* Update instruction length as we may reinject #BP from * Update instruction length as we may reinject #BP from
@ -5257,7 +5257,7 @@ static int handle_task_switch(struct kvm_vcpu *vcpu)
error_code = error_code =
vmcs_read32(IDT_VECTORING_ERROR_CODE); vmcs_read32(IDT_VECTORING_ERROR_CODE);
} }
/* fall through */ fallthrough;
case INTR_TYPE_SOFT_EXCEPTION: case INTR_TYPE_SOFT_EXCEPTION:
kvm_clear_exception_queue(vcpu); kvm_clear_exception_queue(vcpu);
break; break;
@ -5610,7 +5610,7 @@ static int handle_invpcid(struct kvm_vcpu *vcpu)
* keeping track of global entries in shadow page tables. * keeping track of global entries in shadow page tables.
*/ */
/* fall-through */ fallthrough;
case INVPCID_TYPE_ALL_INCL_GLOBAL: case INVPCID_TYPE_ALL_INCL_GLOBAL:
kvm_mmu_unload(vcpu); kvm_mmu_unload(vcpu);
return kvm_skip_emulated_instruction(vcpu); return kvm_skip_emulated_instruction(vcpu);
@ -6578,7 +6578,7 @@ static void __vmx_complete_interrupts(struct kvm_vcpu *vcpu,
break; break;
case INTR_TYPE_SOFT_EXCEPTION: case INTR_TYPE_SOFT_EXCEPTION:
vcpu->arch.event_exit_inst_len = vmcs_read32(instr_len_field); vcpu->arch.event_exit_inst_len = vmcs_read32(instr_len_field);
/* fall through */ fallthrough;
case INTR_TYPE_HARD_EXCEPTION: case INTR_TYPE_HARD_EXCEPTION:
if (idt_vectoring_info & VECTORING_INFO_DELIVER_CODE_MASK) { if (idt_vectoring_info & VECTORING_INFO_DELIVER_CODE_MASK) {
u32 err = vmcs_read32(error_code_field); u32 err = vmcs_read32(error_code_field);
@ -6588,7 +6588,7 @@ static void __vmx_complete_interrupts(struct kvm_vcpu *vcpu,
break; break;
case INTR_TYPE_SOFT_INTR: case INTR_TYPE_SOFT_INTR:
vcpu->arch.event_exit_inst_len = vmcs_read32(instr_len_field); vcpu->arch.event_exit_inst_len = vmcs_read32(instr_len_field);
/* fall through */ fallthrough;
case INTR_TYPE_EXT_INTR: case INTR_TYPE_EXT_INTR:
kvm_queue_interrupt(vcpu, vector, type == INTR_TYPE_SOFT_INTR); kvm_queue_interrupt(vcpu, vector, type == INTR_TYPE_SOFT_INTR);
break; break;

11
arch/x86/kvm/x86.c
View File

@ -1116,14 +1116,12 @@ static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
vcpu->arch.eff_db[dr] = val; vcpu->arch.eff_db[dr] = val;
break; break;
case 4: case 4:
/* fall through */
case 6: case 6:
if (!kvm_dr6_valid(val)) if (!kvm_dr6_valid(val))
return -1; /* #GP */ return -1; /* #GP */
vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu); vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
break; break;
case 5: case 5:
/* fall through */
default: /* 7 */ default: /* 7 */
if (!kvm_dr7_valid(val)) if (!kvm_dr7_valid(val))
return -1; /* #GP */ return -1; /* #GP */
@ -1154,12 +1152,10 @@ int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
*val = vcpu->arch.db[array_index_nospec(dr, size)]; *val = vcpu->arch.db[array_index_nospec(dr, size)];
break; break;
case 4: case 4:
/* fall through */
case 6: case 6:
*val = vcpu->arch.dr6; *val = vcpu->arch.dr6;
break; break;
case 5: case 5:
/* fall through */
default: /* 7 */ default: /* 7 */
*val = vcpu->arch.dr7; *val = vcpu->arch.dr7;
break; break;
@ -3051,7 +3047,8 @@ int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3: case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1: case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
pr = true; /* fall through */ pr = true;
fallthrough;
case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3: case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1: case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
if (kvm_pmu_is_valid_msr(vcpu, msr)) if (kvm_pmu_is_valid_msr(vcpu, msr))
@ -4359,7 +4356,7 @@ static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
case KVM_CAP_HYPERV_SYNIC2: case KVM_CAP_HYPERV_SYNIC2:
if (cap->args[0]) if (cap->args[0])
return -EINVAL; return -EINVAL;
/* fall through */ fallthrough;
case KVM_CAP_HYPERV_SYNIC: case KVM_CAP_HYPERV_SYNIC:
if (!irqchip_in_kernel(vcpu->kvm)) if (!irqchip_in_kernel(vcpu->kvm))
@ -8672,7 +8669,7 @@ static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
vcpu->arch.pv.pv_unhalted = false; vcpu->arch.pv.pv_unhalted = false;
vcpu->arch.mp_state = vcpu->arch.mp_state =
KVM_MP_STATE_RUNNABLE; KVM_MP_STATE_RUNNABLE;
/* fall through */ fallthrough;
case KVM_MP_STATE_RUNNABLE: case KVM_MP_STATE_RUNNABLE:
vcpu->arch.apf.halted = false; vcpu->arch.apf.halted = false;
break; break;

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