ARM: Keystone DTS updates for 4.19

- K2G NIC drriver support
  - Enbale network support for K2G ICE and EVM boards
  - Hardware Ring driver support for k2hk, k2l and k2e socs
  - Add MMC supply for k2g EVM
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Merge tag 'keystone_dts_for_4.19' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone into next/dt

ARM: Keystone DTS updates for 4.19

 - K2G NIC drriver support
 - Enbale network support for K2G ICE and EVM boards
 - Hardware Ring driver support for k2hk, k2l and k2e socs
 - Add MMC supply for k2g EVM

* tag 'keystone_dts_for_4.19' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone:
  ARM: dts: keystone-k2g-evm: Use sdhci-omap programming model
  ARM: dts: keystone-k2g-evm: Add "vqmmc-supply" property for mmc0/mmc1
  ARM: dts: k2e: add dts node for k2e hw_rng driver
  ARM: dts: k2l: add dts node for k2l hw_rng driver
  ARM: dts: k2hk: add dts node for k2hk hw_rng driver
  ARM: dts: keystone-k2g-ice: Enable netcp network driver
  ARM: dts: keystone-k2g-evm: Enable netcp network driver
  ARM: dts: k2g: add dt bindings to support network driver

Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson 2018-07-08 09:10:03 -07:00
commit df054c1544
7 changed files with 346 additions and 8 deletions

View File

@ -225,3 +225,23 @@ interface-1 {
};
};
};
sa_subsys: subsys@24080000 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "simple-bus";
ranges = <0 0x24080000 0x40000>;
sa_config: subsys@0 {
compatible = "syscon";
reg = <0x0 0x100>;
};
rng@24000 {
compatible = "ti,keystone-rng";
reg = <0x24000 0x1000>;
ti,syscon-sa-cfg = <&sa_config>;
clocks = <&clksa>;
clock-names = "fck";
};
};

View File

@ -37,6 +37,14 @@ vcc3v3_dcin_reg: fixedregulator-vcc3v3-dcin {
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
vcc1v8_ldo1_reg: fixedregulator-vcc1v8-ldo1 {
compatible = "regulator-fixed";
regulator-name = "ldo1";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
};
};
&k2g_pinctrl {
@ -128,6 +136,30 @@ K2G_CORE_IOPAD(0x1224) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE1) /* qspicsn2.
K2G_CORE_IOPAD(0x1228) (BUFFER_CLASS_B | PIN_PULLDOWN | MUX_MODE1) /* qspicsn3.dcan1rx */
>;
};
emac_pins: pinmux_emac_pins {
pinctrl-single,pins = <
K2G_CORE_IOPAD(0x113C) (BUFFER_CLASS_D | PULL_DISABLE | MUX_MODE1) /* MII_RXD1.RGMII_RXD1 */
K2G_CORE_IOPAD(0x1138) (BUFFER_CLASS_D | PULL_DISABLE | MUX_MODE1) /* MII_RXD2.RGMII_RXD2 */
K2G_CORE_IOPAD(0x1134) (BUFFER_CLASS_D | PULL_DISABLE | MUX_MODE1) /* MII_RXD3.RGMII_RXD3 */
K2G_CORE_IOPAD(0x1140) (BUFFER_CLASS_D | PULL_DISABLE | MUX_MODE1) /* MII_RXD0.RGMII_RXD0 */
K2G_CORE_IOPAD(0x1178) (BUFFER_CLASS_D | PULL_DISABLE | MUX_MODE1) /* MII_TXD0.RGMII_TXD0 */
K2G_CORE_IOPAD(0x1174) (BUFFER_CLASS_D | PULL_DISABLE | MUX_MODE1) /* MII_TXD1.RGMII_TXD1 */
K2G_CORE_IOPAD(0x1170) (BUFFER_CLASS_D | PULL_DISABLE | MUX_MODE1) /* MII_TXD2.RGMII_TXD2 */
K2G_CORE_IOPAD(0x116C) (BUFFER_CLASS_D | PULL_DISABLE | MUX_MODE1) /* MII_TXD3.RGMII_TXD3 */
K2G_CORE_IOPAD(0x1154) (BUFFER_CLASS_D | PULL_DISABLE | MUX_MODE1) /* MII_TXCLK.RGMII_TXC */
K2G_CORE_IOPAD(0x117C) (BUFFER_CLASS_D | PULL_DISABLE | MUX_MODE1) /* MII_TXEN.RGMII_TXCTL */
K2G_CORE_IOPAD(0x1120) (BUFFER_CLASS_D | PULL_DISABLE | MUX_MODE1) /* MII_RXCLK.RGMII_RXC */
K2G_CORE_IOPAD(0x1144) (BUFFER_CLASS_D | PULL_DISABLE | MUX_MODE1) /* MII_RXDV.RGMII_RXCTL */
>;
};
mdio_pins: pinmux_mdio_pins {
pinctrl-single,pins = <
K2G_CORE_IOPAD(0x118C) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* MDIO_CLK.MDIO_CLK */
K2G_CORE_IOPAD(0x1188) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* MDIO_DATA.MDIO_DATA */
>;
};
};
&uart0 {
@ -144,6 +176,7 @@ &mmc0 {
pinctrl-names = "default";
pinctrl-0 = <&mmc0_pins>;
vmmc-supply = <&vcc3v3_dcin_reg>;
vqmmc-supply = <&vcc3v3_dcin_reg>;
cd-gpios = <&gpio1 12 GPIO_ACTIVE_LOW>;
status = "okay";
};
@ -152,6 +185,7 @@ &mmc1 {
pinctrl-names = "default";
pinctrl-0 = <&mmc1_pins>;
vmmc-supply = <&vcc3v3_dcin_reg>; /* VCC3V3_EMMC is connected to VCC3V3_DCIN */
vqmmc-supply = <&vcc1v8_ldo1_reg>;
ti,non-removable;
status = "okay";
};
@ -294,3 +328,32 @@ &dcan1 {
pinctrl-0 = <&dcan1_pins>;
status = "okay";
};
&qmss {
status = "okay";
};
&knav_dmas {
status = "okay";
};
&mdio {
pinctrl-names = "default";
pinctrl-0 = <&mdio_pins>;
status = "okay";
ethphy0: ethernet-phy@0 {
reg = <0>;
};
};
&gbe0 {
phy-handle = <&ethphy0>;
phy-mode = "rgmii-id";
status = "okay";
};
&netcp {
pinctrl-names = "default";
pinctrl-0 = <&emac_pins>;
status = "okay";
};

View File

@ -7,6 +7,7 @@
/dts-v1/;
#include "keystone-k2g.dtsi"
#include <dt-bindings/net/ti-dp83867.h>
/ {
compatible = "ti,k2g-ice", "ti,k2g", "ti,keystone";
@ -281,6 +282,30 @@ K2G_CORE_IOPAD(0x11b8) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE3) /* spi2_scsn0.g
K2G_CORE_IOPAD(0x11bc) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE3) /* spi2_scsn1.gpio0_102 */
>;
};
emac_pins: pinmux_emac_pins {
pinctrl-single,pins = <
K2G_CORE_IOPAD(0x113C) (BUFFER_CLASS_D | PULL_DISABLE | MUX_MODE1) /* MII_RXD1.RGMII_RXD1 */
K2G_CORE_IOPAD(0x1138) (BUFFER_CLASS_D | PULL_DISABLE | MUX_MODE1) /* MII_RXD2.RGMII_RXD2 */
K2G_CORE_IOPAD(0x1134) (BUFFER_CLASS_D | PULL_DISABLE | MUX_MODE1) /* MII_RXD3.RGMII_RXD3 */
K2G_CORE_IOPAD(0x1140) (BUFFER_CLASS_D | PULL_DISABLE | MUX_MODE1) /* MII_RXD0.RGMII_RXD0 */
K2G_CORE_IOPAD(0x1178) (BUFFER_CLASS_D | PULL_DISABLE | MUX_MODE1) /* MII_TXD0.RGMII_TXD0 */
K2G_CORE_IOPAD(0x1174) (BUFFER_CLASS_D | PULL_DISABLE | MUX_MODE1) /* MII_TXD1.RGMII_TXD1 */
K2G_CORE_IOPAD(0x1170) (BUFFER_CLASS_D | PULL_DISABLE | MUX_MODE1) /* MII_TXD2.RGMII_TXD2 */
K2G_CORE_IOPAD(0x116C) (BUFFER_CLASS_D | PULL_DISABLE | MUX_MODE1) /* MII_TXD3.RGMII_TXD3 */
K2G_CORE_IOPAD(0x1154) (BUFFER_CLASS_D | PULL_DISABLE | MUX_MODE1) /* MII_TXCLK.RGMII_TXC */
K2G_CORE_IOPAD(0x117C) (BUFFER_CLASS_D | PULL_DISABLE | MUX_MODE1) /* MII_TXEN.RGMII_TXCTL */
K2G_CORE_IOPAD(0x1120) (BUFFER_CLASS_D | PULL_DISABLE | MUX_MODE1) /* MII_RXCLK.RGMII_RXC */
K2G_CORE_IOPAD(0x1144) (BUFFER_CLASS_D | PULL_DISABLE | MUX_MODE1) /* MII_RXDV.RGMII_RXCTL */
>;
};
mdio_pins: pinmux_mdio_pins {
pinctrl-single,pins = <
K2G_CORE_IOPAD(0x118C) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* MDIO_CLK.MDIO_CLK */
K2G_CORE_IOPAD(0x1188) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* MDIO_DATA.MDIO_DATA */
>;
};
};
&uart0 {
@ -386,3 +411,37 @@ pca9536: gpio@41 {
vcc-supply = <&vdd_3v3>;
};
};
&qmss {
status = "okay";
};
&knav_dmas {
status = "okay";
};
&netcp {
pinctrl-names = "default";
pinctrl-0 = <&emac_pins>;
status = "okay";
};
&mdio {
pinctrl-names = "default";
pinctrl-0 = <&mdio_pins>;
status = "okay";
ethphy0: ethernet-phy@0 {
reg = <0>;
ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>;
ti,tx-internal-delay = <DP83867_RGMIIDCTL_250_PS>;
ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>;
ti,min-output-impedance;
ti,dp83867-rxctrl-strap-quirk;
};
};
&gbe0 {
phy-handle = <&ethphy0>;
phy-mode = "rgmii-id";
status = "okay";
};

View File

@ -0,0 +1,147 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Device Tree Source for K2G Netcp driver
*
* Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/
*/
qmss: qmss@4020000 {
compatible = "ti,66ak2g-navss-qm";
dma-coherent;
#address-cells = <1>;
#size-cells = <1>;
power-domains = <&k2g_pds 0x0018>;
clocks = <&k2g_clks 0x0018 0>;
clock-names = "nss_vclk";
ranges;
queue-range = <0 0x80>;
linkram0 = <0x4020000 0x7ff>;
status = "disabled";
qmgrs {
#address-cells = <1>;
#size-cells = <1>;
ranges;
qmgr0 {
managed-queues = <0 0x80>;
reg = <0x4100000 0x800>,
<0x4040000 0x100>,
<0x4080000 0x800>,
<0x40c0000 0x800>;
reg-names = "peek", "config",
"region", "push";
};
};
queue-pools {
qpend {
qpend-0 {
qrange = <77 8>;
interrupts =<0 308 0xf04 0 309 0xf04 0 310 0xf04
0 311 0xf04 0 312 0xf04 0 313 0xf04
0 314 0xf04 0 315 0xf04>;
qalloc-by-id;
};
};
general-purpose {
gp-0 {
qrange = <112 8>;
};
netcp-tx {
qrange = <5 8>;
qalloc-by-id;
};
};
};
descriptor-regions {
#address-cells = <1>;
#size-cells = <1>;
ranges;
region-12 {
id = <12>;
region-spec = <1023 128>; /* num_desc desc_size */
link-index = <0x400>;
};
};
}; /* qmss */
knav_dmas: knav_dmas@0 {
compatible = "ti,keystone-navigator-dma";
#address-cells = <1>;
#size-cells = <1>;
status = "disabled";
power-domains = <&k2g_pds 0x0018>;
clocks = <&k2g_clks 0x0018 0>;
clock-names = "nss_vclk";
ranges;
ti,navigator-cloud-address = <0x40c0000 0x40c0000 0x40c0000 0x40c0000>;
dma_gbe: dma_gbe@0 {
reg = <0x4010000 0x100>,
<0x4011000 0x2a0>, /* 21 Tx channels */
<0x4012000 0x400>, /* 32 Rx channels */
<0x4010100 0x80>,
<0x4013000 0x400>; /* 32 Rx flows */
reg-names = "global", "txchan", "rxchan",
"txsched", "rxflow";
};
};
netcp: netcp@4000000 {
reg = <0x2620110 0x8>;
reg-names = "efuse";
compatible = "ti,netcp-1.0";
#address-cells = <1>;
#size-cells = <1>;
status = "disabled";
power-domains = <&k2g_pds 0x0018>;
clocks = <&k2g_clks 0x0018 3>, <&k2g_clks 0x0018 8>;
clock-names = "ethss_clk", "cpts";
/* NetCP address range */
ranges = <0 0x4000000 0x1000000>;
dma-coherent;
ti,navigator-dmas = <&dma_gbe 0>, <&dma_gbe 5>;
ti,navigator-dma-names = "netrx0", "nettx";
netcp-devices {
#address-cells = <1>;
#size-cells = <1>;
ranges;
gbe: gbe@200000 {
label = "netcp-gbe";
compatible = "ti,netcp-gbe-2";
reg = <0x200000 0x20>, <0x220000 0x20000>;
enable-ale;
tx-queue = <5>;
tx-channel = "nettx";
cpts-rftclk-sel = <0>;
cpts-ext-ts-inputs = <8>;
interfaces {
gbe0: interface-0 {
slave-port = <0>;
link-interface = <5>;
};
};
};
};
netcp-interfaces {
interface-0 {
rx-channel = "netrx0";
rx-pool = <512 12>;
tx-pool = <511 12>;
rx-queue-depth = <128 128 0 0>;
rx-buffer-size = <1518 4096 0 0>;
rx-queue = <77>;
tx-completion-queue = <78>;
efuse-mac = <1>;
netcp-gbe = <&gbe0>;
};
};
};

View File

@ -391,13 +391,10 @@ edma1_tptc1: tptc@27b8000 {
};
mmc0: mmc@23000000 {
compatible = "ti,k2g-hsmmc", "ti,omap4-hsmmc";
compatible = "ti,k2g-sdhci";
reg = <0x23000000 0x400>;
interrupts = <GIC_SPI 96 IRQ_TYPE_EDGE_RISING>;
dmas = <&edma1 24 0>, <&edma1 25 0>;
dma-names = "tx", "rx";
bus-width = <4>;
ti,needs-special-reset;
no-1-8-v;
max-frequency = <96000000>;
power-domains = <&k2g_pds 0xb>;
@ -407,13 +404,12 @@ mmc0: mmc@23000000 {
};
mmc1: mmc@23100000 {
compatible = "ti,k2g-hsmmc", "ti,omap4-hsmmc";
compatible = "ti,k2g-sdhci";
reg = <0x23100000 0x400>;
interrupts = <GIC_SPI 97 IRQ_TYPE_EDGE_RISING>;
dmas = <&edma1 26 0>, <&edma1 27 0>;
dma-names = "tx", "rx";
bus-width = <8>;
ti,needs-special-reset;
no-1-8-v;
non-removable;
max-frequency = <96000000>;
power-domains = <&k2g_pds 0xc>;
clocks = <&k2g_clks 0xc 1>, <&k2g_clks 0xc 2>;
@ -609,5 +605,18 @@ emif: emif@21010000 {
reg = <0x21010000 0x200>;
interrupts = <GIC_SPI 123 IRQ_TYPE_EDGE_RISING>;
};
mdio: mdio@4200f00 {
compatible = "ti,keystone_mdio", "ti,davinci_mdio";
reg = <0x04200f00 0x100>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&k2g_clks 0x0018 3>;
clock-names = "fck";
power-domains = <&k2g_pds 0x0018>;
status = "disabled";
bus_freq = <2500000>;
};
#include "keystone-k2g-netcp.dtsi"
};
};

View File

@ -228,3 +228,23 @@ interface-1 {
};
};
};
sa_subsys: subsys@20c0000 {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0x20c0000 0x40000>;
sa_config: subsys@0 {
compatible = "syscon";
reg = <0x0 0x100>;
};
rng@24000 {
compatible = "ti,keystone-rng";
reg = <0x24000 0x1000>;
ti,syscon-sa-cfg = <&sa_config>;
clocks = <&clksa>;
clock-names = "fck";
};
};

View File

@ -208,3 +208,23 @@ interface-1 {
};
};
};
sa_subsys: subsys@26080000 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "simple-bus";
ranges = <0 0x26080000 0x40000>;
sa_config: subsys@0 {
compatible = "syscon";
reg = <0x0 0x100>;
};
rng@24000 {
compatible = "ti,keystone-rng";
reg = <0x24000 0x1000>;
ti,syscon-sa-cfg = <&sa_config>;
clocks = <&clksa>;
clock-names = "fck";
};
};