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clk: samsung: exynos4: set parent of sclk_hdmiphy to hdmi
sclk_hdmiphy clock is generated by HDMI-PHY and depends on hdmi gate clock. The patch models this dependency using parent/child hirerarchy. The patch fixes issue with system hangs during mixer device access, mixer uses sclk_hdmiphy descendant clock. Signed-off-by: Andrzej Hajda <a.hajda@samsung.com> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
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@ -505,7 +505,7 @@ static struct samsung_fixed_rate_clock exynos4_fixed_rate_ext_clks[] __initdata
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/* fixed rate clocks generated inside the soc */
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static struct samsung_fixed_rate_clock exynos4_fixed_rate_clks[] __initdata = {
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FRATE(0, "sclk_hdmi24m", NULL, CLK_IS_ROOT, 24000000),
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FRATE(CLK_SCLK_HDMIPHY, "sclk_hdmiphy", NULL, CLK_IS_ROOT, 27000000),
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FRATE(CLK_SCLK_HDMIPHY, "sclk_hdmiphy", "hdmi", 0, 27000000),
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FRATE(0, "sclk_usbphy0", NULL, CLK_IS_ROOT, 48000000),
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};
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