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ARM: dts: add property for maximum ADC clock frequencies
The ADC clock frequency is limited depending on modes used. Add device tree property which allow to set the mode used and the maximum frequency ratings for the instance. These allows to set the ADC clock to a frequency which is within specification according to the actual mode used. Acked-by: Fugang Duan <B38611@freescale.com> Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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@ -228,6 +228,8 @@ adc0: adc@4003b000 {
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clock-names = "adc";
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#io-channel-cells = <1>;
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status = "disabled";
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fsl,adck-max-frequency = <30000000>, <40000000>,
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<20000000>;
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};
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wdoga5: wdog@4003e000 {
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@ -470,6 +472,8 @@ esdhc0: esdhc@400b1000 {
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<&clks VF610_CLK_ESDHC0>;
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clock-names = "ipg", "ahb", "per";
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status = "disabled";
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fsl,adck-max-frequency = <30000000>, <40000000>,
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<20000000>;
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};
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esdhc1: esdhc@400b2000 {
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