AuxXxilium/linux_dsm_epyc7002
1
0
Fork 0
mirror of https://github.com/AuxXxilium/linux_dsm_epyc7002.git synced 2024-12-21 02:49:14 +07:00
Code Issues Actions Packages Projects Releases Wiki Activity

drm/bridge: Prepare Analogix anx6345 support

Browse Source 
Add bit definitions required for the anx6345 and add a
sanity check in anx_dp_aux_transfer.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Torsten Duwe <duwe@suse.de>
Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://patchwork.freedesktop.org/patch/msgid/20191107135218.01C2168C4E@verein.lst.de
This commit is contained in:
Torsten Duwe 2019-10-29 13:16:57 +01:00 committed by Maxime Ripard
parent 0712eca92c
commit dea73d6146
No known key found for this signature in database
GPG Key ID: E3EF0D6F671851C5
3 changed files with 12 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
drivers/gpu/drm/bridge/analogix/analogix-i2c-dptx.c
View File

@ -116,7 +116,7 @@ ssize_t anx_dp_aux_transfer(struct regmap *map_dptx,
else /* For non-zero-sized set the length field. */ else /* For non-zero-sized set the length field. */
ctrl1 |= (msg->size - 1) << SP_AUX_LENGTH_SHIFT; ctrl1 |= (msg->size - 1) << SP_AUX_LENGTH_SHIFT;
if ((msg->request & DP_AUX_I2C_READ) == 0) { if ((msg->size > 0) && ((msg->request & DP_AUX_I2C_READ) == 0)) {
/* When WRITE | MOT write values to data buffer */ /* When WRITE | MOT write values to data buffer */
err = regmap_bulk_write(map_dptx, err = regmap_bulk_write(map_dptx,
SP_DP_BUF_DATA0_REG, buffer, SP_DP_BUF_DATA0_REG, buffer,

8
drivers/gpu/drm/bridge/analogix/analogix-i2c-dptx.h
View File

@ -72,7 +72,11 @@
#define SP_CHA_STA BIT(2) #define SP_CHA_STA BIT(2)
/* Bits for DP System Control Register 3 */ /* Bits for DP System Control Register 3 */
#define SP_HPD_STATUS BIT(6) #define SP_HPD_STATUS BIT(6)
#define SP_HPD_FORCE BIT(5)
#define SP_HPD_CTRL BIT(4)
#define SP_STRM_VALID BIT(2) #define SP_STRM_VALID BIT(2)
#define SP_STRM_FORCE BIT(1)
#define SP_STRM_CTRL BIT(0)
/* Bits for DP System Control Register 4 */ /* Bits for DP System Control Register 4 */
#define SP_ENHANCED_MODE BIT(3) #define SP_ENHANCED_MODE BIT(3)
@ -117,6 +121,9 @@
#define SP_LINK_BW_SET_MASK 0x1f #define SP_LINK_BW_SET_MASK 0x1f
#define SP_INITIAL_SLIM_M_AUD_SEL BIT(5) #define SP_INITIAL_SLIM_M_AUD_SEL BIT(5)
/* DP Lane Count Setting Register */
#define SP_DP_LANE_COUNT_SET_REG 0xa1
/* DP Training Pattern Set Register */ /* DP Training Pattern Set Register */
#define SP_DP_TRAINING_PATTERN_SET_REG 0xa2 #define SP_DP_TRAINING_PATTERN_SET_REG 0xa2
@ -130,6 +137,7 @@
/* DP Link Training Control Register */ /* DP Link Training Control Register */
#define SP_DP_LT_CTRL_REG 0xa8 #define SP_DP_LT_CTRL_REG 0xa8
#define SP_DP_LT_INPROGRESS 0x80
#define SP_LT_ERROR_TYPE_MASK 0x70 #define SP_LT_ERROR_TYPE_MASK 0x70
# define SP_LT_NO_ERROR 0x00 # define SP_LT_NO_ERROR 0x00
# define SP_LT_AUX_WRITE_ERROR 0x01 # define SP_LT_AUX_WRITE_ERROR 0x01

3
drivers/gpu/drm/bridge/analogix/analogix-i2c-txcommon.h
View File

@ -177,6 +177,9 @@
#define SP_VBIT BIT(1) #define SP_VBIT BIT(1)
#define SP_AUDIO_LAYOUT BIT(0) #define SP_AUDIO_LAYOUT BIT(0)
/* Analog Debug Register 1 */
#define SP_ANALOG_DEBUG1_REG 0xdc
/* Analog Debug Register 2 */ /* Analog Debug Register 2 */
#define SP_ANALOG_DEBUG2_REG 0xdd #define SP_ANALOG_DEBUG2_REG 0xdd
#define SP_FORCE_SW_OFF_BYPASS 0x20 #define SP_FORCE_SW_OFF_BYPASS 0x20